X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM5200.h;h=107bff19ffa35dbfad2e4b0022b94654b9a07fb9;hb=a784c01adcefe3efd4e651c5230e6117a7be35f8;hp=fe1d10290be44d4932b4c24a21cf2766c0f612ec;hpb=74de7aefd79690bae8cf5a5120f5962d444be089;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index fe1d102..107bff1 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -408,6 +408,8 @@
 
 /* Dynamic MTD partition support */
 #define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT		"nor0=TQM5200-0"
 
 #ifdef CONFIG_STK52XX
@@ -538,6 +540,8 @@
  *	 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
  *		Extended POST test is not available.
  *		Use for STK52xx, FO300 and CAM5200 boards.
+ *		WARNING: When the extended POST is enabled, these bits will
+ *			 be overridden by this code as GPIOs!
  * use PCI_DIS: Bit 16 (mask 0x00008000):
  *	   1 -> disable PCI controller (on CAM5200 board).
  * use USB: Bits 18-19 (mask 0x00003000):
@@ -550,7 +554,7 @@
  *	 000 -> All PSC2 pins are GPIOs.
  *	 100 -> UART (on CAM5200 board).
  *	 001 -> CAN1/2 on PSC2 pins.
- *	        Use for REV100 STK52xx boards
+ *		Use for REV100 STK52xx boards
  *	 01x -> Use AC97 (on FO300 board).
  * use PSC1: Bits 29-31 (mask: 0x00000007):
  *	 100 -> UART (on all boards).
@@ -629,13 +633,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
@@ -709,20 +708,20 @@
 
 #define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
 
-/* Offset for data I/O			*/
+/* Offset for data I/O */
 #define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
 
-/* Offset for normal register accesses	*/
+/* Offset for normal register accesses */
 #define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
 
-/* Offset for alternate registers	*/
+/* Offset for alternate registers */
 #define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
 
-/* Interval between registers						     */
+/* Interval between registers */
 #define CONFIG_SYS_ATA_STRIDE		4
 
 /* Support ATAPI devices */
-#define CONFIG_ATAPI            1
+#define CONFIG_ATAPI			1
 
 /*-----------------------------------------------------------------------
  * Open firmware flat tree support