X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FT4240RDB.h;h=0d9cdfb510ee6a0f6511f8346ef6476a3c6a4bfb;hb=1b330894bd40cb0d7ef37bb761d104820f794aae;hp=15b8219bcf254dfb5e35e9b398b2a7d9766ce856;hpb=2863a9bfc29092be37f8beee230883367b057065;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 15b8219..0d9cdfb 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -10,9 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_T4240RDB -#define CONFIG_DISPLAY_BOARDINFO - #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE4 @@ -20,21 +17,12 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_rcw.cfg #ifndef CONFIG_SDCARD #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT -#define CONFIG_SPL_ENV_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_DRIVERS_MISC_SUPPORT -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -44,7 +32,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000 @@ -54,6 +41,7 @@ #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg #define CONFIG_SPL_MMC_BOOT #endif @@ -61,7 +49,6 @@ #define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#define CONFIG_SYS_NO_FLASH #endif #endif @@ -72,9 +59,6 @@ #define CONFIG_CMD_REGINFO /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -87,18 +71,13 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS -#define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE /* @@ -145,13 +124,11 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 /* * IFC Definitions @@ -259,10 +236,8 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ /* SATA */ @@ -280,7 +255,6 @@ #define CONFIG_LBA48 #define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION #endif #ifdef CONFIG_FMAN_ENET @@ -298,8 +272,6 @@ /* * Command line configuration. */ -#define CONFIG_CMD_ERRATA -#define CONFIG_CMD_IRQ #ifdef CONFIG_PCI #define CONFIG_CMD_PCI @@ -343,13 +315,11 @@ /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 -#define CONFIG_BAUDRATE 115200 - #define CONFIG_HVBOOT \ "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_MTD_NOR_FLASH #ifndef CONFIG_RAMBOOT_PBL #define CONFIG_ENV_IS_NOWHERE #endif @@ -702,7 +672,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_LBA48 #define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION #endif #ifdef CONFIG_FMAN_ENET @@ -714,29 +683,17 @@ unsigned long get_board_ddr_clk(void); /* * USB */ -#define CONFIG_USB_STORAGE -#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB -#define CONFIG_MMC - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -/* Hash command with SHA acceleration supported in hardware */ -#ifdef CONFIG_FSL_CAAM -#define CONFIG_CMD_HASH -#define CONFIG_SHA_HW_ACCEL -#endif - #define __USB_PHY_TYPE utmi @@ -746,7 +703,7 @@ unsigned long get_board_ddr_clk(void); * interleaving. It can be cacheline, page, bank, superbank. * See doc/README.fsl-ddr for details. */ -#ifdef CONFIG_PPC_T4240 +#ifdef CONFIG_ARCH_T4240 #define CTRL_INTLV_PREFERED 3way_4KB #else #define CTRL_INTLV_PREFERED cacheline