X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FT208xRDB.h;h=fc0007d1ac83ce3b8ad4dd485b0300aab618382e;hb=4862830b696a6d0750e19d32a82553cdb41a85f8;hp=5fe4c96b044a4ef25cb46e05b1bc9cdf73ee572a;hpb=ebca902aeb3af3eaedd2787928184ad84a86b98f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5fe4c96..fc0007d 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -16,7 +15,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS #ifdef CONFIG_PHYS_64BIT @@ -32,8 +30,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC @@ -112,28 +108,15 @@ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 10000000 -#define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 #elif defined(CONFIG_SDCARD) -#define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 0x800) #elif defined(CONFIG_NAND) -#define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) @@ -167,7 +150,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10) #define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024) -#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull @@ -188,7 +170,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -342,7 +323,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -450,11 +430,6 @@ unsigned long get_board_ddr_clk(void); /* * eSPI - Enhanced SPI */ -#ifdef CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_BAR -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE 0 -#endif /* * General PCI @@ -596,8 +571,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_AQUANTIA #define CONFIG_PHY_CORTINA #define CONFIG_PHY_REALTEK #define CONFIG_CORTINA_FW_LENGTH 0x40000 @@ -610,7 +583,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif @@ -649,11 +621,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment