X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FT208xQDS.h;h=3f28549d02e91dfd2db4884666eb95f395340757;hb=bb6b142fc16713bb83e471912e614ac01eec4584;hp=5957fa891428fe816795a240b7b4c909a4511bc2;hpb=e6de55ec5bf306df3b3cc8e7a4cc17fa1e78ca6c;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 5957fa8..3f28549 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -26,7 +26,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_PHYS_64BIT #define CONFIG_BOOKE #define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_E500MC /* BOOKE e500mc family */ @@ -291,6 +290,10 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_SHIFT 0 #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x04 +#define QIXIS_LBMAP_NAND 0x09 +#define QIXIS_LBMAP_SD 0x00 +#define QIXIS_RCW_SRC_NAND 0x104 +#define QIXIS_RCW_SRC_SD 0x040 #define QIXIS_RST_CTL_RESET 0x83 #define QIXIS_RST_FORCE_MEM 0x1 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 @@ -455,10 +458,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - /* * I2C */ @@ -544,7 +543,6 @@ unsigned long get_board_ddr_clk(void); #ifndef CONFIG_SPL_BUILD #endif -#define CONFIG_CMD_SF #define CONFIG_SPI_FLASH_BAR #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 @@ -555,10 +553,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCIE_RESET #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ @@ -718,18 +716,15 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_LBA48 #define CONFIG_CMD_SATA #define CONFIG_DOS_PARTITION -#define CONFIG_CMD_EXT2 #endif /* * USB */ #ifdef CONFIG_USB_EHCI -#define CONFIG_CMD_USB #define CONFIG_USB_STORAGE #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_CMD_EXT2 #define CONFIG_HAS_FSL_DR_USB #endif @@ -737,20 +732,16 @@ unsigned long get_board_ddr_clk(void); * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_CMD_MMC #define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_GENERIC_MMC -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION #define CONFIG_FSL_ESDHC_ADAPTER_IDENT #endif - /* * Dynamic MTD Partition support with mtdparts */ @@ -776,13 +767,8 @@ unsigned long get_board_ddr_clk(void); /* * Command line configuration. */ -#define CONFIG_CMD_DHCP #define CONFIG_CMD_ERRATA -#define CONFIG_CMD_GREPENV #define CONFIG_CMD_IRQ -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #ifdef CONFIG_PCI @@ -834,7 +820,6 @@ unsigned long get_board_ddr_clk(void); /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 #define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -854,7 +839,7 @@ unsigned long get_board_ddr_clk(void); "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=t2080qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=1e00000\0" \ "fdtfile=t2080qds/t2080qds.dtb\0" \ "bdev=sda3\0"