X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FT104xRDB.h;h=45aaf906f71018a0c8cae4936528fc9921895d4a;hb=b0cf733933c3bc1b4ab353e16affabc60f863db5;hp=02633b641b91cfc55e47ce494000c00457e9a5fb;hpb=cbe7706ab8aab06c18edaa9b120371f9c8012728;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 02633b6..45aaf90 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -10,10 +10,6 @@ /* * T104x RDB board configuration file */ -#define CONFIG_T104xRDB -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_E500 /* BOOKE e500 family */ #include #ifdef CONFIG_RAMBOOT_PBL @@ -25,27 +21,8 @@ $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg #endif -#ifdef CONFIG_T1040RDB -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg -#endif -#ifdef CONFIG_T1042RDB_PI -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg -#endif -#ifdef CONFIG_T1042RDB -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg -#endif -#ifdef CONFIG_T1040D4RDB -#define CONFIG_SYS_FSL_PBL_RCW \ -$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg -#endif -#ifdef CONFIG_T1042D4RDB -#define CONFIG_SYS_FSL_PBL_RCW \ -$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg -#endif - #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x30001000 #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 @@ -75,6 +52,26 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#ifdef CONFIG_TARGET_T1040RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040_nand_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_nand_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_nand_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_nand_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg +#endif #define CONFIG_SPL_NAND_BOOT #endif @@ -89,6 +86,26 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif +#ifdef CONFIG_TARGET_T1040RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040_spi_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_spi_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_spi_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_spi_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg +#endif #define CONFIG_SPL_SPI_BOOT #endif @@ -103,23 +120,37 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif +#ifdef CONFIG_TARGET_T1040RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040_sd_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_sd_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042_sd_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_sd_rcw.cfg +#endif +#ifdef CONFIG_TARGET_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg +#endif #define CONFIG_SPL_MMC_BOOT #endif #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ /* support deep sleep */ #define CONFIG_DEEP_SLEEP -#if defined(CONFIG_DEEP_SLEEP) -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SILENT_CONSOLE -#endif #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xeff40000 @@ -130,10 +161,9 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -143,8 +173,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE #ifndef CONFIG_SYS_NO_FLASH @@ -237,14 +265,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -303,13 +327,13 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_T1042RDB_PI) +#if defined(CONFIG_TARGET_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 -#elif defined(CONFIG_T1042D4RDB) +#elif defined(CONFIG_TARGET_T1042D4RDB) #define CPLD_DIU_SEL_DFP 0xc0 #endif -#if defined(CONFIG_T1040D4RDB) +#if defined(CONFIG_TARGET_T1040D4RDB) #define CPLD_INT_MASK_ALL 0xFF #define CPLD_INT_MASK_THERM 0x80 #define CPLD_INT_MASK_DVI_DFP 0x40 @@ -476,23 +500,15 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ -#endif -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042RDB_PI) || defined(CONFIG_TARGET_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB #ifdef CONFIG_FSL_DIU_FB #define CONFIG_FSL_DIU_CH7301 #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO #define CONFIG_CMD_BMP -#define CONFIG_CFB_CONSOLE -#define CONFIG_CFB_CONSOLE_ANSI -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif @@ -516,11 +532,11 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define I2C_MUX_CH_DEFAULT 0x8 -#endif -#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) +#if defined(CONFIG_TARGET_T1042RDB_PI) || \ + defined(CONFIG_TARGET_T1040D4RDB) || \ + defined(CONFIG_TARGET_T1042D4RDB) /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 @@ -601,10 +617,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ /* SATA */ @@ -620,7 +633,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_LBA48 #define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION #endif /* @@ -637,13 +649,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #endif #endif -#define CONFIG_MMC - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION #endif /* Qman/Bman */ @@ -677,10 +686,8 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define CONFIG_QE #define CONFIG_U_QE -#endif /* Default address of microcode for the Linux Fman driver */ #if defined(CONFIG_SPIFLASH) @@ -706,7 +713,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -716,7 +722,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #else #define CONFIG_SYS_QE_FW_ADDR 0xEFF10000 #endif -#endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) @@ -729,17 +734,17 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #endif #ifdef CONFIG_FMAN_ENET -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 -#elif defined(CONFIG_T1040D4RDB) +#elif defined(CONFIG_TARGET_T1040D4RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x01 -#elif defined(CONFIG_T1042D4RDB) +#elif defined(CONFIG_TARGET_T1042D4RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 #define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 #define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 #endif -#ifdef CONFIG_T104XD4RDB +#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) #define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 #define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 #else @@ -748,10 +753,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #endif /* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1040D4RDB) +#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) #define CONFIG_VSC9953 #define CONFIG_CMD_ETHSW -#ifdef CONFIG_T1040RDB +#ifdef CONFIG_TARGET_T1040RDB #define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 #define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 #else @@ -774,7 +779,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg /* * Command line configuration. */ -#ifdef CONFIG_T1042RDB_PI +#ifdef CONFIG_TARGET_T1042RDB_PI #define CONFIG_CMD_DATE #endif #define CONFIG_CMD_ERRATA @@ -852,15 +857,15 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define __USB_PHY_TYPE utmi #define RAMDISKFILE "t104xrdb/ramdisk.uboot" -#ifdef CONFIG_T1040RDB +#ifdef CONFIG_TARGET_T1040RDB #define FDTFILE "t1040rdb/t1040rdb.dtb" -#elif defined(CONFIG_T1042RDB_PI) +#elif defined(CONFIG_TARGET_T1042RDB_PI) #define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" -#elif defined(CONFIG_T1042RDB) +#elif defined(CONFIG_TARGET_T1042RDB) #define FDTFILE "t1042rdb/t1042rdb.dtb" -#elif defined(CONFIG_T1040D4RDB) +#elif defined(CONFIG_TARGET_T1040D4RDB) #define FDTFILE "t1042rdb/t1040d4rdb.dtb" -#elif defined(CONFIG_T1042D4RDB) +#elif defined(CONFIG_TARGET_T1042D4RDB) #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif