X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FSPD823TS.h;h=ae4dcc2ccca9d73064c4b42957f5a00f132ff761;hb=d56019c0eed08632c2b1f828ca9e0b22d6151414;hp=bbd5939f2f0c7e575caf2a99a2b198f7e8ca5634;hpb=0f8c9768ff83244c49857a0c79fe04e947f387ce;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h
index bbd5939..ae4dcc2 100644
--- a/include/configs/SPD823TS.h
+++ b/include/configs/SPD823TS.h
@@ -74,7 +74,7 @@
 #define CONFIG_IPADDR		10.0.0.98
 #define CONFIG_SERVERIP		10.0.0.1
 #undef	CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND	"tftp 200000 pImage;bootm 200000"
+#define CONFIG_BOOTCOMMAND	"tftp 200000 uImage;bootm 200000"
 /*----------------------------------------------------------------------*/
 
 /*
@@ -307,7 +307,6 @@
  *-----------------------------------------------------------------------
  *
  */
-/*#define	CFG_DER 0x2002000F*/
 #define CFG_DER 0
 
 /*
@@ -382,7 +381,7 @@
  */
 
 /* periodic timer for refresh */
-#define CFG_MAMR_PTB	204
+#define CFG_MBMR_PTB	204
 
 /* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit	*/
 #define CFG_MPTPR_2BK_4K	MPTPR_PTP_DIV16		/* setting for 2 banks	*/
@@ -397,9 +396,9 @@
  */
 
 /* 8 column SDRAM */
-#define CFG_MBMR_8COL	((CFG_MAMR_PTB << MAMR_PTB_SHIFT)  | \
-			 MAMR_AMB_TYPE_0 | MAMR_DSB_1_CYCL | MAMR_G0CLB_A11 |	\
-			 MAMR_RLFB_1X	 | MAMR_WLFB_1X	   | MAMR_TLFB_4X)
+#define CFG_MBMR_8COL	((CFG_MBMR_PTB << MBMR_PTB_SHIFT)  | \
+			 MBMR_AMB_TYPE_0 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A11 |	\
+			 MBMR_RLFB_1X	 | MBMR_WLFB_1X	   | MBMR_TLFB_4X)
 
 /*
  * Internal Definitions