X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FSIMPC8313.h;h=e006b55533bf009f55478baba45596e5c1908e9e;hb=31a4f1e5b6ee9b6335f0313dce7637cef887f84f;hp=b939cfa79f5d09d3a0a20adf9a4605bc9cc9df0e;hpb=44a01a73e8e68704fba7ce48091c70003cb4569e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h
index b939cfa..e006b55 100644
--- a/include/configs/SIMPC8313.h
+++ b/include/configs/SIMPC8313.h
@@ -32,12 +32,27 @@
 #define CONFIG_NAND_U_BOOT
 
 #define CONFIG_E300			1
-#define CONFIG_MPC83XX			1
-#define CONFIG_MPC831X			1
+#define CONFIG_MPC83xx			1
+#define CONFIG_MPC831x			1
 #define CONFIG_MPC8313			1
 
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST	0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_START	0x00100100
+#define CONFIG_SYS_NAND_U_BOOT_RELOC	0x00010000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
+
+#define CONFIG_SYS_TEXT_BASE	0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
+#else
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
+#endif
+
 #define CONFIG_PCI
-#define CONFIG_83XX_GENERIC_PCI
+#define CONFIG_FSL_ELBC			1
 
 #define CONFIG_MISC_INIT_R
 
@@ -91,18 +106,15 @@
  */
 #define CONFIG_SYS_NO_FLASH
 
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE	/* start of monitor */
-
 #if !defined(CONFIG_NAND_SPL)
 #define CONFIG_SYS_RAMBOOT
 #endif
 
 #define CONFIG_SYS_INIT_RAM_LOCK	1
 #define CONFIG_SYS_INIT_RAM_ADDR	0xFD000000	/* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END		0x1000		/* End of used area in RAM*/
+#define CONFIG_SYS_INIT_RAM_SIZE		0x1000		/* Size of used area in RAM*/
 
-#define CONFIG_SYS_GBL_DATA_SIZE	0x100		/* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
@@ -112,7 +124,9 @@
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR		(LCRR_DBYP | LCRR_EADC_1 | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
+#define CONFIG_SYS_LCRR_EADC	LCRR_EADC_1
+#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR	(0x00040000 /* TODO */ \
 				| (0xFF << LBCR_BMT_SHIFT) \
 				| 0xF )	/* 0x0004ff0f */
@@ -125,6 +139,7 @@
 #else
 #define CONFIG_SYS_NAND_BASE		0xE2800000
 #endif
+#define CONFIG_SYS_FPGA_BASE		0xFF000000
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define NAND_MAX_CHIPS			1
@@ -132,11 +147,6 @@
 #define CONFIG_CMD_NAND 		1
 #define CONFIG_NAND_FSL_ELBC		1
 
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(512 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST	0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_START	0x00100100
-#define CONFIG_SYS_NAND_U_BOOT_RELOC	0x00010000
-
 #define CONFIG_SYS_NAND_BR_PRELIM	( CONFIG_SYS_NAND_BASE \
 					| (2<<BR_DECC_SHIFT)	/* Use HW ECC */ \
 					| BR_PS_8		/* Port Size = 8 bit */ \
@@ -182,6 +192,16 @@
 #define CONFIG_SYS_NAND_LBLAWBAR_PRELIM	CONFIG_SYS_LBLAWBAR0_PRELIM
 #define CONFIG_SYS_NAND_LBLAWAR_PRELIM	CONFIG_SYS_LBLAWAR0_PRELIM
 
+#define CONFIG_SYS_BR1_PRELIM		( CONFIG_SYS_FPGA_BASE \
+					| BR_PS_16 \
+					| BR_MS_UPMA \
+					| BR_V )
+#define CONFIG_SYS_OR1_PRELIM		( OR_AM_2MB \
+					| OR_UPM_BCTLD)
+
+#define CONFIG_SYS_LBLAWBAR1_PRELIM	CONFIG_SYS_FPGA_BASE
+#define CONFIG_SYS_LBLAWAR1_PRELIM	(LBLAWAR_EN | LBLAWAR_2MB)
+
 /*
  * JFFS2 configuration
  */
@@ -189,7 +209,8 @@
 #define CONFIG_JFFS2_DEV	"nand0"
 
 /* mtdparts command line support */
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
 #define MTDIDS_DEFAULT		"nand0=nand0"
 #define MTDPARTS_DEFAULT	"mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)"
 
@@ -223,7 +244,6 @@
 #define CONFIG_HARD_I2C			/* I2C with hardware support*/
 #define CONFIG_FSL_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 #define CONFIG_SYS_I2C_NOPROBES		{{0,0x69}} /* Don't probe these addrs */
@@ -252,7 +272,6 @@
  */
 #define CONFIG_TSEC_ENET		/* TSEC ethernet support */
 
-#define CONFIG_NET_MULTI
 #define CONFIG_GMII			/* MII PHY management */
 
 #ifdef CONFIG_TSEC1
@@ -340,7 +359,7 @@
 #endif
 
 #define CONFIG_CMDLINE_EDITING		1
-
+#define CONFIG_AUTO_COMPLETE		/* add autocompletion support   */
 
 /*
  * Miscellaneous configurable options
@@ -359,10 +378,10 @@
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 256 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ		(256 << 20)	/* Initial Memory map for Linux*/
 
 #define CONFIG_SYS_RCWH_PCIHOST		0x80000000	/* PCIHOST */
 
@@ -405,12 +424,14 @@
 				| SICRH_ETSEC2_G	\
 				| SICRH_TSOBI1		\
 				| SICRH_TSOBI2 )
-#define CONFIG_SYS_SICRL	(SICRL_USBDR		\
+#define CONFIG_SYS_SICRL	( SICRL_LBC		\
+				| SICRL_USBDR_10	\
 				| SICRL_ETSEC2_A )
 
 #define CONFIG_SYS_HID0_INIT	0x000000000
-#define CONFIG_SYS_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK	\
-				| HID0_ENABLE_DYNAMIC_POWER_MANAGMENT )
+#define CONFIG_SYS_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK | \
+				 HID0_ENABLE_INSTRUCTION_CACHE | \
+				 HID0_ENABLE_DYNAMIC_POWER_MANAGMENT )
 
 #define CONFIG_SYS_HID2		HID2_HBE
 
@@ -437,7 +458,7 @@
 #define CONFIG_SYS_IBAT5U	(CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L	(0xF0000000 | BATL_PP_10)
+#define CONFIG_SYS_IBAT6L	(0xF0000000 | BATL_PP_10 | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 
 #define CONFIG_SYS_IBAT7L	(0)
@@ -461,14 +482,6 @@
 #define CONFIG_SYS_DBAT7U	CONFIG_SYS_IBAT7U
 
 /*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM	0x02	/* Software reboot */
-
-/*
  * Environment Configuration
  */
 #define CONFIG_ENV_OVERWRITE
@@ -495,11 +508,11 @@
 	"ethprime=TSEC1\0"						\
 	"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"				\
 	"tftpflash=tftpboot $loadaddr $uboot; "				\
-		"protect off " MK_STR(TEXT_BASE) " +$filesize; "	\
-		"erase " MK_STR(TEXT_BASE) " +$filesize; "		\
-		"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; "	\
-		"protect on " MK_STR(TEXT_BASE) " +$filesize; "		\
-		"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0"	\
+		"protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "	\
+		"erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "		\
+		"cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; "	\
+		"protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "		\
+		"cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0"	\
 	"fdtaddr=ae0000\0"						\
 	"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"				\
 	"console=ttyS0\0"						\