X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPPChameleonEVB.h;h=6fba0caad2d5868e9a9c78af6a6835ea6cf038e8;hb=84efbf4d144ff8aaed3cca036aebb1fe69eff3f4;hp=e66f8efead30fae8a2e7a230dd75e5b3dadc505e;hpb=6d0f6bcf337c5261c08fabe12982178c2c489d76;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index e66f8ef..6fba0ca 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -104,6 +104,7 @@
 #undef CONFIG_EXT_PHY
 #define CONFIG_NET_MULTI	1
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #ifndef	 CONFIG_EXT_PHY
 #define CONFIG_PHY_ADDR		1	/* EMAC0 PHY address		*/
@@ -191,7 +192,6 @@
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external serial clock used */
-#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59	/* ignore ppc405gp errata #59	*/
 #define CONFIG_SYS_BASE_BAUD		691200
 
 /* The following table includes the supported baudrates */
@@ -210,6 +210,9 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------
  */
+
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
+
 /*
  * nand device 1 on dave (PPChameleonEVB) needs more time,
  * so we just introduce additional wait in nand_wait(),
@@ -223,8 +226,6 @@
 #define NAND_BIG_DELAY_US	25
 #define CONFIG_SYS_MAX_NAND_DEVICE	2	/* Max number of NAND devices */
 
-#define NAND_MAX_CHIPS 1
-
 #define CONFIG_SYS_NAND0_CE  (0x80000000 >> 1)	 /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4)	 /* our RDY is GPIO4 */
 #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2)	 /* our CLE is GPIO2 */
@@ -311,32 +312,6 @@
 	} \
 } while(0)
 
-#if 0
-#define SECTORSIZE 512
-#define NAND_NO_RB
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN	0x00
-#define NAND_MAX_FLOORS 1
-
-#ifdef NAND_NO_RB
-/* constant delay (see also tR in the datasheet) */
-#define NAND_WAIT_READY(nand) do { \
-	udelay(12); \
-} while (0)
-#else
-/* use the R/B pin */
-/* TBD */
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-#endif
 /*-----------------------------------------------------------------------
  * PCI stuff
  *-----------------------------------------------------------------------
@@ -806,14 +781,14 @@
  */
 
 /* No command line, one static partition */
-#undef CONFIG_JFFS2_CMDLINE
+#undef CONFIG_CMD_MTDPARTS
 #define CONFIG_JFFS2_DEV		"nand0"
 #define CONFIG_JFFS2_PART_SIZE		0x00400000
 #define CONFIG_JFFS2_PART_OFFSET	0x00000000
 
 /* mtdparts command line support */
 /*
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
 #define MTDIDS_DEFAULT		"nor0=PPChameleon-0,nand0=ppchameleonevb-nand"
 */