X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPMC405.h;h=966bbf9a3188ea6710114bfd5d2dfd86faf3218f;hb=becbbc7b2a1be44d38779c80ce94fb20e5e13f12;hp=b29f368f57c252aa1686718c90ec943002e69e8d;hpb=6bf6f114dcdd97ec3f80c2761ed40e31229d6b78;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index b29f368..966bbf9 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -214,7 +214,7 @@
 #define CFG_FLASH_INCREMENT	0x01000000
 
 #define CFG_FLASH_CFI         1       /* Flash is CFI conformant */
-#define CFG_FLASH_CFI_DRIVER  1       /* Use the common driver */
+#define CONFIG_FLASH_CFI_DRIVER  1       /* Use the common driver */
 #define CFG_FLASH_PROTECTION  1       /* don't use hardware protection        */
 #define CFG_FLASH_USE_BUFFER_WRITE 1  /* use buffered writes (20x faster)     */
 #define CFG_MAX_FLASH_BANKS   2       /* max num of flash banks */
@@ -270,16 +270,6 @@
 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 
 /*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/
-					/* have only 8kB, 16kB is save here	*/
-#define CFG_CACHELINE_SIZE	32	/* ...			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  */
 #define FLASH0_BA	0xFF000000	    /* FLASH 0 Base Address		*/