X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPM520.h;h=d9405b012ea5ac61ee73c23bcfc3fa9cc921e903;hb=32bf3d143a888f8deacfdcc97e898f6c06d0aea4;hp=a91662cf956b65879d1d002521c643efec8696b2;hpb=49822e23a09e2f529e6774ad61f23e43ab208cbc;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/PM520.h b/include/configs/PM520.h index a91662c..d9405b0 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2003-2004 + * (C) Copyright 2003-2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -40,11 +40,6 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - /* * Serial console configuration */ @@ -72,16 +67,11 @@ #define CONFIG_PCI_IO_SIZE 0x01000000 #define CONFIG_NET_MULTI 1 +#define CONFIG_MII 1 #define CONFIG_EEPRO100 1 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #undef CONFIG_NS8382X -#define ADD_PCI_CMD CFG_CMD_PCI - -#else /* MPC5100 */ - -#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */ - #endif /* Partitions */ @@ -90,34 +80,48 @@ /* USB */ #if 1 #define CONFIG_USB_OHCI -#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT #define CONFIG_USB_STORAGE -#else -#define ADD_USB_CMD 0 #endif -#if defined(CONFIG_BOOT_ROM) -#define ADD_DOC_CMD 0 -#else -#define ADD_DOC_CMD CFG_CMD_DOC +#if !defined(CONFIG_BOOT_ROM) +/* DoC requires legacy NAND for now */ +#define CFG_NAND_LEGACY #endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + /* - * Supported commands + * Command line configuration. */ -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ - CFG_CMD_EEPROM | \ - CFG_CMD_FAT | \ - CFG_CMD_I2C | \ - CFG_CMD_IDE | \ - ADD_DOC_CMD | \ - ADD_PCI_CMD | \ - CFG_CMD_DATE | \ - CFG_CMD_BEDBUG | \ - ADD_USB_CMD) - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include +#include + +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_CMD_USB + +#if !defined(CONFIG_BOOT_ROM) +#define CONFIG_CMD_DOC +#endif + +#if defined(CONFIG_MPC5200) +#define CONFIG_CMD_PCI +#endif + /* * Autobooting @@ -125,7 +129,7 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_PREBOOT "echo;" \ - "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ "echo" #undef CONFIG_BOOTARGS @@ -134,16 +138,16 @@ "netdev=eth0\0" \ "hostname=pm520\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ + "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ - ":$(hostname):$(netdev):off panic=1\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ "flash_nfs=run nfsargs addip;" \ - "bootm $(kernel_addr)\0" \ + "bootm ${kernel_addr}\0" \ "flash_self=run ramargs addip;" \ - "bootm $(kernel_addr) $(ramdisk_addr)\0" \ - "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk30/ppc_82xx\0" \ "bootfile=/tftpboot/PM520/uImage\0" \ "" @@ -154,7 +158,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* * I2C configuration @@ -196,12 +200,13 @@ * Flash configuration (8,16 or 32 MB) * TEXT base always at 0xFFF00000 * ENV_ADDR always at 0xFFF40000 - * FLASH_BASE at 0xFC000000 for 32 MB + * FLASH_BASE at 0xFA000000 for 64 MB + * 0xFC000000 for 32 MB * 0xFD000000 for 16 MB * 0xFD800000 for 8 MB */ -#define CFG_FLASH_BASE 0xfc000000 -#define CFG_FLASH_SIZE 0x02000000 +#define CFG_FLASH_BASE 0xFA000000 +#define CFG_FLASH_SIZE 0x04000000 #define CFG_BOOTROM_BASE 0xFFF00000 #define CFG_BOOTROM_SIZE 0x00080000 #define CFG_ENV_ADDR (0xFDF00000 + 0x40000) @@ -210,17 +215,18 @@ * Flash configuration (8,16 or 32 MB) * TEXT base always at 0xFFF00000 * ENV_ADDR always at 0xFFF40000 - * FLASH_BASE at 0xFE000000 for 32 MB + * FLASH_BASE at 0xFC000000 for 64 MB + * 0xFE000000 for 32 MB * 0xFF000000 for 16 MB * 0xFF800000 for 8 MB */ -#define CFG_FLASH_BASE 0xfe000000 -#define CFG_FLASH_SIZE 0x02000000 +#define CFG_FLASH_BASE 0xFC000000 +#define CFG_FLASH_SIZE 0x04000000 #define CFG_ENV_ADDR (0xFFF00000 + 0x40000) #endif #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -286,7 +292,7 @@ */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -302,6 +308,11 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + /* * Various low-level settings */ @@ -321,11 +332,11 @@ #define CFG_CS0_SIZE CFG_BOOTROM_SIZE #define CFG_CS1_START CFG_FLASH_BASE #define CFG_CS1_SIZE CFG_FLASH_SIZE -#define CFG_CS1_CFG 0x0004fb00 +#define CFG_CS1_CFG 0x0004FF00 #else #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x0004fb00 +#define CFG_BOOTCS_CFG 0x0004FF00 #define CFG_CS0_START CFG_FLASH_BASE #define CFG_CS0_SIZE CFG_FLASH_SIZE #define CFG_CS1_START CFG_DOC_BASE