X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPIP405.h;h=29888b4e1c272d917a2ca704dd34dc6b1dfe1b38;hb=7f673c99c2d8d1aa21996c5b914f06d784b080ca;hp=2966979cb8550d6d297f924a147d3daeadfb5788;hpb=6d0f6bcf337c5261c08fabe12982178c2c489d76;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2966979..29888b4 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -2,23 +2,7 @@ * (C) Copyright 2001 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -35,6 +19,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PIP405 1 /* ...on a PIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Clock ***********************************************************/ @@ -71,16 +58,11 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_MII #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_DOC #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_BSP - -#define CONFIG_NAND_LEGACY - #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** * I2C Stuff: * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address @@ -89,9 +71,11 @@ * EEPROM of the SDRAM * The Atmel EEPROM uses 16Bit addressing. ***************************************************************/ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 @@ -113,6 +97,8 @@ #define SPD_EEPROM_ADDRESS 0x50 #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /************************************************************** * Environment definitions **************************************************************/ @@ -157,7 +143,6 @@ * Miscellaneous configurable options **********************************************************/ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -170,6 +155,12 @@ #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ #define CONFIG_SYS_BASE_BAUD 691200 @@ -181,8 +172,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- @@ -192,6 +181,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ #define CONFIG_PCI_PNP /* pci plug-and-play */ /* resource configuration */ @@ -224,11 +214,17 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_UPDATE_FLASH_SIZE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CONFIG_FLASH_SHOW_PROGRESS 45 + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* * Init Memory Controller: @@ -252,20 +248,10 @@ #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of On Chip SRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ @@ -278,6 +264,7 @@ /************************************************************ * Ethernet Stuff ***********************************************************/ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ /************************************************************ @@ -359,14 +346,13 @@ #define CONFIG_USB_STORAGE /* Enable needed helper functions */ -#define CONFIG_SYS_DEVICE_DEREGISTER /* needs device_deregister */ +#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ /************************************************************ * Debug support ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************