X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPIP405.h;h=091b768a99203d5e23fc73ed315d8a3ea6a362bb;hb=addb2e1650fdf872334478393f482dfdce965a61;hp=a5fc8d9aa2bb87cb39ff210ef01afa4eb28544da;hpb=c609719b8d1b2dca590e0ed499016d041203e403;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index a5fc8d9..091b768 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -50,22 +50,27 @@
 			CFG_CMD_PCI	| \
 			CFG_CMD_CACHE	| \
 			CFG_CMD_IRQ	| \
+			CFG_CMD_ECHO	| \
 			CFG_CMD_EEPROM	| \
 			CFG_CMD_I2C	| \
 			CFG_CMD_REGINFO | \
 			CFG_CMD_FDC	| \
 			CFG_CMD_SCSI	| \
+			CFG_CMD_FAT 	| \
 			CFG_CMD_DATE	| \
 			CFG_CMD_ELF	| \
 			CFG_CMD_USB	| \
 			CFG_CMD_MII	| \
 			CFG_CMD_SDRAM	| \
 			CFG_CMD_DOC	| \
+			CFG_CMD_PING	| \
 			CFG_CMD_SAVES   | \
 			CFG_CMD_BSP	)
 /* this must be included AFTER the definition of CONFIG_COMMANDS  (if any) */
 #include <cmd_confdefs.h>
 
+#define CFG_NAND_LEGACY
+
 #define	 CFG_HUSH_PARSER
 #define	 CFG_PROMPT_HUSH_PS2 "> "
 /**************************************************************
@@ -100,7 +105,7 @@
  ***************************************************************/
 #define SPD_EEPROM_ADDRESS      0x50
 
-#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 /**************************************************************
  * Environment definitions
  **************************************************************/
@@ -109,11 +114,11 @@
 
 #define CONFIG_BOOTDELAY	5
 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
-#define CONFIG_BOOT_RETRY_TIME	-10	/* feature is avaiable but not enabled */
+/* #define CONFIG_BOOT_RETRY_TIME	-10	/XXX* feature is available but not enabled */
 #define CONFIG_ZERO_BOOTDELAY_CHECK  	/* check console even if bootdelay = 0 */
 
 
-#define CONFIG_BOOTCOMMAND	"diskboot 200000 0:1; bootm" /* autoboot command		*/
+#define CONFIG_BOOTCOMMAND	"diskboot 400000 0:1; bootm" /* autoboot command		*/
 #define CONFIG_BOOTARGS		"console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 
 #define CONFIG_IPADDR		10.0.0.100
@@ -140,7 +145,7 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
 
-
+#define CONFIG_MISC_INIT_R
 /***********************************************************
  * Miscellaneous configurable options
  **********************************************************/
@@ -166,7 +171,7 @@
 	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 	 57600, 115200, 230400, 460800, 921600 }
 
-#define CFG_LOAD_ADDR		0x200000	/* default load address */
+#define CFG_LOAD_ADDR		0x400000	/* default load address */
 #define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */
 
 #define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */
@@ -201,7 +206,7 @@
 #define CFG_FLASH_BASE		0xFFF80000
 #define CFG_MONITOR_BASE	CFG_FLASH_BASE
 #define CFG_MONITOR_LEN		(512 * 1024)	/* Reserve 512 kB for Monitor	*/
-#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
+#define CFG_MALLOC_LEN		(1024 * 1024)	/* Reserve 1024 kB for malloc()	*/
 
 /*
  * For booting Linux, the board info and command line data
@@ -221,7 +226,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE		8192	/* For IBM 405 CPUs			*/
+#define CFG_DCACHE_SIZE		8192	/* For AMCC 405 CPUs			*/
 #define CFG_CACHELINE_SIZE	32	/* ...			*/
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
@@ -230,16 +235,18 @@
 /*
  * Init Memory Controller:
  */
+#define FLASH_MAX_SIZE		0x00800000		/* 8MByte max */
+#define FLASH_BASE_PRELIM	0xFF800000  /* open the flash CS */
+/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
+#define FLASH_SIZE_PRELIM	 3  /* maximal flash FLASH size bank #0	*/
 
-#define FLASH_BASE0_PRELIM	0xFFC00000	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Configuration Port location */
 #define CONFIG_PORT_ADDR	0xF4000000
 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
 
 
-
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in On Chip SRAM)
  */
@@ -299,6 +306,7 @@
 #undef	CONFIG_IDE_LED			/* no led for ide supported	*/
 #define CONFIG_IDE_RESET		/* reset for ide supported...	*/
 #define CONFIG_IDE_RESET_ROUTINE	/* with a special reset function */
+#define CONFIG_SUPPORT_VFAT
 
 /************************************************************
  * ATAPI support (experimental)
@@ -365,10 +373,16 @@
 #endif
 
 /************************************************************
+ * support BZIP2 compression
+ ************************************************************/
+#define CONFIG_BZIP2		1
+
+/************************************************************
  * Ident
  ************************************************************/
 #define VERSION_TAG "released"
-#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, MEV-10066-001 " VERSION_TAG
+#define CONFIG_ISO_STRING "MEV-10066-001"
+#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
 
 
 #endif	/* __CONFIG_H */