X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FPCIPPC2.h;h=e778c5956635778023b2eac9a7f92c274a017b6f;hb=d621da0066dff92a76ca3c6fb031a7f823a811f3;hp=99a8c4a6466d62695de3108ed5e72b0599ebd261;hpb=2419169f5749d7af501b3b77a5336d1d535320de;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h
index 99a8c4a..e778c59 100644
--- a/include/configs/PCIPPC2.h
+++ b/include/configs/PCIPPC2.h
@@ -43,6 +43,8 @@
 
 #define CONFIG_PCIPPC2		1	/* this is a PCIPPC2 board	*/
 
+#define	CONFIG_SYS_TEXT_BASE	0xfff00000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1
 #define CONFIG_MISC_INIT_R	1
 
@@ -117,7 +119,7 @@
 
 #define CONFIG_SYS_RESET_ADDRESS   0xFFF00100
 
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_MONITOR_LEN	    (256 << 10) /* Reserve 256 kB for Monitor	*/
 #define CONFIG_SYS_MALLOC_LEN	    (128 << 10) /* Reserve 128 kB for malloc()	*/
@@ -138,11 +140,10 @@
 
 /* Size in bytes reserved for initial data
  */
-#define CONFIG_SYS_GBL_DATA_SIZE    128
 
 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_END      0x8000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE      0x8000
+#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_INIT_RAM_LOCK
@@ -194,9 +195,8 @@
  * For the detail description refer to the PCIPPC2 user's manual.
  */
 #define CONFIG_SYS_HZ		      1000
-#define CONFIG_SYS_BUS_HZ            100000000 /* bus speed - 100 mhz          */
+#define CONFIG_SYS_BUS_CLK            100000000 /* bus speed - 100 mhz          */
 #define CONFIG_SYS_CPU_CLK	      300000000
-#define CONFIG_SYS_BUS_CLK	      100000000
 
 /*
  * For booting Linux, the board info and command line data
@@ -239,14 +239,6 @@
 		   L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
 #define L2_ENABLE (L2_INIT | L2CR_L2E)
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
 /*-----------------------------------------------------------------------
   RTC m48t59
 */