X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FP4080DS.h;h=117def9dc2fed4b62569ff8b34b632366f4c9dcc;hb=7ef548e6008d4225e0ae7c9af35cb76558756a62;hp=c8f542eabe8f0ad6a078d456d401904b9c881b06;hpb=868da5936e40b8685c813c1eb31eed629eaae295;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index c8f542e..117def9 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -1,47 +1,24 @@
 /*
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
  * P4080 DS board configuration file
+ * Also supports P4040 DS
  */
-#define CONFIG_P4080DS
-#define CONFIG_PHYS_64BIT
-#define CONFIG_PPC_P4080
-#define CONFIG_SYS_NUM_FMAN		2
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_SYS_NUM_FM2_DTSEC	4
-#define CONFIG_SYS_NUM_FM1_10GEC	1
-#define CONFIG_SYS_NUM_FM2_10GEC	1
-#define CONFIG_NUM_DDR_CONTROLLERS	2
+#define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
 
-#define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
+#define CONFIG_PCIE3
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
+#define CONFIG_SYS_SATA_MAX_DEVICE  2
+#define CONFIG_LBA48
 
-#define CONFIG_SYS_P4080_ERRATUM_CPU22
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
-#define CONFIG_SYS_P4080_ERRATUM_SERDES8
+#define CONFIG_SYS_SRIO
+#define CONFIG_SRIO1			/* SRIO port 1 */
+#define CONFIG_SRIO2			/* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
+#define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
 
 #include "corenet_ds.h"