X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FP2041RDB.h;h=36d08d8e7fff4cb97aa6e6d05b26d4c5918a3495;hb=85fc970d74d09f33fcdcc649e73c5dc4f5334605;hp=7a3fa03c3dd6bea916d8c27a53f4684682024bb6;hpb=c27269953b94d19b3fc7a21a1c3e19985507b94d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 7a3fa03..36d08d8 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -24,13 +24,9 @@ #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_NO_FLASH #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -43,9 +39,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -60,10 +54,7 @@ #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_SYS_NO_FLASH -#if !defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) -#define CONFIG_ENV_IS_NOWHERE -#endif +#ifndef CONFIG_MTD_NOR_FLASH #else #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -82,14 +73,12 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_EXTRA_ENV_RELOC - #define CONFIG_ENV_IS_IN_MMC #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 1658) #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) @@ -99,7 +88,6 @@ #elif defined(CONFIG_ENV_IS_NOWHERE) #define CONFIG_ENV_SIZE 0x2000 #else - #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \ - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE 0x2000 @@ -168,7 +156,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 @@ -280,7 +267,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R @@ -538,7 +524,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ /* SATA */ @@ -557,8 +542,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA #define CONFIG_LBA48 -#define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION #endif #ifdef CONFIG_FMAN_ENET @@ -590,8 +573,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* * Command line configuration. */ -#define CONFIG_CMD_ERRATA -#define CONFIG_CMD_IRQ #ifdef CONFIG_PCI #define CONFIG_CMD_PCI @@ -604,7 +585,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif @@ -613,14 +593,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION -#endif - -/* Hash command with SHA acceleration supported in hardware */ -#ifdef CONFIG_FSL_CAAM -#define CONFIG_CMD_HASH -#define CONFIG_SHA_HW_ACCEL #endif /* @@ -664,9 +636,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 - -#define CONFIG_BAUDRATE 115200 - #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \