X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FP1022DS.h;h=84325846fd8e04de99538245849c017572ff0a33;hb=504bf790da08db9b4a443566cf6ef577f9c7996a;hp=3332f58ea8bafef4232c169bf6b85f215ed51368;hpb=278b90ce786f73faf29aa522d5d101e1da006378;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 3332f58..8432584 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2010-2012 Freescale Semiconductor, Inc. * Authors: Srikanth Srinivasan * Timur Tabi - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -12,10 +11,8 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_SDCARD -#define CONFIG_SPL_MMC_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) @@ -34,7 +31,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) @@ -60,7 +56,7 @@ #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_TPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) @@ -69,7 +65,6 @@ #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xff800000 #define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 @@ -83,7 +78,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc @@ -216,15 +210,15 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 #ifndef CONFIG_SYS_MONITOR_BASE -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE +#elif defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Nand Flash */ @@ -265,8 +259,6 @@ #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_BOARD_EARLY_INIT_R -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG #define CONFIG_FSL_NGPIXIS @@ -310,7 +302,6 @@ #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) -#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) @@ -339,7 +330,6 @@ /* * Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -367,9 +357,6 @@ #undef CONFIG_SYS_FLASH_EMPTY_INFO #endif -#ifndef CONFIG_FSL_DIU_FB -#endif - #ifdef CONFIG_ATI #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT #define CONFIG_BIOSEMU @@ -399,15 +386,6 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 1 /* - * eSPI - Enhanced SPI - */ - -#define CONFIG_HARD_SPI - -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE 0 - -/* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ @@ -490,16 +468,13 @@ #endif #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif -#define CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET #define CONFIG_TSECV2 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 @@ -520,18 +495,11 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_FLASH_CFI_MTD /* * Environment */ #ifdef CONFIG_SPIFLASH -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 10000000 -#define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 @@ -574,9 +542,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* @@ -595,7 +560,7 @@ * Environment Configuration */ -#define CONFIG_HOSTNAME p1022ds +#define CONFIG_HOSTNAME "p1022ds" #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */