X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FP1010RDB.h;h=b7e44d1737397e8e9933ba447cea2042a28a8c05;hb=8f07f5376a21a57ce191e5548b1a30c9709994d3;hp=f578e0bd8752ae459af77e6e8a993b0b714856f4;hpb=a5e609b982a004e009e8ee0aa6066785db425ac2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f578e0b..b7e44d1 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -11,6 +11,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include + #include #define CONFIG_NAND_FSL_IFC @@ -148,39 +150,9 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif -#if !defined(CONFIG_DM_PCI) -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_SYS_PCIE1_NAME "mini PCIe Slot" -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 -#endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ - -#if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_SYS_PCIE2_NAME "PCIe Slot" -#elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_SYS_PCIE2_NAME "mini PCIe Slot" -#endif -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 -#else -#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#endif -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ -#endif - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif -#define CONFIG_ENV_OVERWRITE - #define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1010 RDB */ #define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */ @@ -194,11 +166,6 @@ #define CONFIG_ENABLE_36BIT_PHYS -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_ADDR_MAP 1 -#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ -#endif - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD @@ -530,8 +497,8 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* I2C */ -#ifndef CONFIG_DM_I2C -#define CONFIG_SYS_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) +#define CONFIG_SYS_I2C_LEGACY #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 @@ -641,7 +608,6 @@ extern unsigned long get_sdram_size(void); */ #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION -#define CONFIG_SYS_MMC_ENV_DEV 0 #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))