X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FNETVIA.h;h=a18b4801272a332f863ec526a057ed62b11bde26;hb=3df4f46f3209c067dcadc969ed02d27c97fa3632;hp=87c920f421a32984bcf25e3dae06187c5c1e861c;hpb=f82642e33899766892499b163e60560fbbf87773;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index 87c920f..a18b480 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -107,7 +107,7 @@ #define CONFIG_CMD_PING #if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 -#define CONFIG_CMD_NAND +/* #define CONFIG_CMD_NAND */ /* disabled */ #endif @@ -393,81 +393,6 @@ #endif -/*****************************************************************************/ - -#define CONFIG_NAND_LEGACY - -#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 - -/* NAND */ -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 - -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \ - } while(0) - -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \ - ; \ - } while (0) - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#endif /*****************************************************************************/