X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FNETPHONE.h;h=27e7ab9bcec15ce2a89912d2515ee6d8b8a0fbf8;hb=776488eb88d0915945eeecfc1ad3e318979f9548;hp=444f721cc85a847bfdf704002a49ebae75043b80;hpb=addb2e1650fdf872334478393f482dfdce965a61;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index 444f721..27e7ab9 100644
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -66,7 +66,7 @@
 
 #undef	CONFIG_BOOTARGS
 #define CONFIG_BOOTCOMMAND							\
-	"tftpboot; " 								\
+	"tftpboot; "								\
 	"setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "	\
 	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;"	\
 	"bootm"
@@ -82,21 +82,30 @@
 #define	CONFIG_STATUS_LED	1	/* Status LED enabled		*/
 #define CONFIG_BOARD_SPECIFIC_LED	/* version has board specific leds */
 
-#define CONFIG_BOOTP_MASK		(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
 
 #undef CONFIG_MAC_PARTITION
 #undef CONFIG_DOS_PARTITION
 
 #define	CONFIG_RTC_MPC8xx		/* use internal RTC of MPC8xx	*/
 
-#define	CONFIG_NET_MULTI	1 	/* the only way to get the FEC in */
+#define	CONFIG_NET_MULTI	1	/* the only way to get the FEC in */
 #define	FEC_ENET		1	/* eth.c needs it that way... */
 #undef CFG_DISCOVER_PHY
 #define CONFIG_MII		1
+#define CONFIG_MII_INIT		1
 #define CONFIG_RMII		1	/* use RMII interface */
 
 #define CONFIG_ETHER_ON_FEC1	1
-#define CONFIG_FEC1_PHY		8 	/* phy address of FEC */
+#define CONFIG_FEC1_PHY		8	/* phy address of FEC */
 #define CONFIG_FEC1_PHY_NORXERR 1
 
 #define CONFIG_ETHER_ON_FEC2	1
@@ -105,20 +114,22 @@
 
 #define CONFIG_ENV_OVERWRITE	1	/* allow modification of vendor params */
 
-#define CONFIG_COMMANDS       ( CONFIG_CMD_DFL	| \
-				CFG_CMD_NAND	| \
-				CFG_CMD_DHCP	| \
-				CFG_CMD_PING  	| \
-				CFG_CMD_MII 	| \
-				CFG_CMD_CDP	  \
-				)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_CDP
+
 
 #define CONFIG_BOARD_EARLY_INIT_F	1
 #define CONFIG_MISC_INIT_R
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
 /*
  * Miscellaneous configurable options
  */
@@ -128,7 +139,7 @@
 #define CFG_HUSH_PARSER	1
 #define CFG_PROMPT_HUSH_PS2	"> "
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
 #else
 #define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
@@ -220,7 +231,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
 #endif
 
@@ -281,27 +292,27 @@
 #if MPC8XX_HZ == 120000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (0 << PLPRCR_S_SHIFT) | (12 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 100000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (0 << PLPRCR_S_SHIFT) | (10 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 50000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (3 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 25000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (2 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (3 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 40000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (4 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 75000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (1 << PLPRCR_S_SHIFT) | (15 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #else
 #error unsupported CPU freq for XIN = 10MHz
 #endif
@@ -311,15 +322,15 @@
 #if MPC8XX_HZ == 120000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (0 << PLPRCR_S_SHIFT) | (12 << PLPRCR_MFI_SHIFT) | (4 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ == 100000000
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (0 << PLPRCR_S_SHIFT) | (6 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #elif MPC8XX_HZ ==  66666666
 #define CFG_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
 			 (1 << PLPRCR_S_SHIFT) | (8 << PLPRCR_MFI_SHIFT) | (2 << PLPRCR_PDF_SHIFT) | \
-		 	 PLPRCR_TEXPS)
+			 PLPRCR_TEXPS)
 #else
 #error unsupported CPU freq for XIN = 50MHz
 #endif
@@ -503,7 +514,7 @@
 #define ADDR_COLUMN		1
 #define ADDR_PAGE		2
 #define ADDR_COLUMN_PAGE	3
-#define NAND_ChipID_UNKNOWN 	0x00
+#define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
 #define NAND_MAX_CHIPS		1