X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8610HPCD.h;h=2014450be839dc01c449a5f089ff0e22a5bb23e6;hb=a1dc980d88a5c9c2b99251c8d8299b0c8948de73;hp=8160b28f784aed7fd2a1990845886e6923fbb46a;hpb=f1993ca066100fcaba7d49fecae0ef604e5807e2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 8160b28..2014450 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -1,9 +1,7 @@ /* * Copyright 2007-2011 Freescale Semiconductor, Inc. * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. + * SPDX-License-Identifier: GPL-2.0 */ /* @@ -13,26 +11,16 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_DISPLAY_BOARDINFO - /* High Level Configuration Options */ -#define CONFIG_MPC8610 1 /* MPC8610 specific */ -#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_SYS_TEXT_BASE 0xfff00000 - /* video */ #define CONFIG_FSL_DIU_FB #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x2c000) -#define CONFIG_VIDEO -#define CONFIG_CMD_BMP -#define CONFIG_CFB_CONSOLE -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #endif @@ -47,14 +35,12 @@ */ #define CONFIG_SYS_SCRATCH_VA 0xc0000000 -#define CONFIG_PCI 1 /* Enable PCI/PCIE*/ -#define CONFIG_PCI1 1 /* PCI controler 1 */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ @@ -74,7 +60,6 @@ #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) #endif -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_R 1 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ @@ -84,7 +69,6 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ #define CONFIG_SYS_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ @@ -93,7 +77,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD for DDR */ #define CONFIG_DDR_SPD @@ -106,7 +89,6 @@ #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) @@ -138,14 +120,12 @@ #endif - #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - #define CONFIG_SYS_FLASH_BASE 0xf0000000 /* start of FLASH 128M */ #define CONFIG_SYS_FLASH_BASE2 0xf8000000 @@ -163,7 +143,6 @@ #define CONFIG_SYS_BR3_PRELIM 0xe8000801 /* port size 8bit */ #define CONFIG_SYS_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/ - #define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define PIXIS_BASE 0xe8000000 /* PIXIS registers */ #define PIXIS_ID 0x0 /* Board ID at offset 0 */ @@ -235,17 +214,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER - -/* - * Pass open firmware flat tree to kernel - */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 - - /* maximum size of the flat tree (8K) */ #define OF_FLAT_TREE_MAX_SIZE 8192 @@ -290,12 +258,10 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */ - #if defined(CONFIG_PCI) #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_REGINFO #define CONFIG_ULI526X @@ -307,8 +273,6 @@ ************************************************************/ #define CONFIG_PCI_OHCI 1 #define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_USB_KEYBOARD 1 -#define CONFIG_SYS_STDIO_DEREGISTER #define CONFIG_SYS_USB_EVENT_POLL 1 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 @@ -320,7 +284,6 @@ #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ #endif -#define CONFIG_DOS_PARTITION #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI @@ -399,7 +362,6 @@ #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U - /* * BAT5 128K Cacheable, non-guarded * 0xe400_0000 128K Init RAM for stack in the CPU DCache (no backing memory) @@ -437,7 +399,6 @@ #define CONFIG_SYS_IBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U - /* * Environment */ @@ -455,7 +416,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - /* * BOOTP options */ @@ -464,22 +424,15 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ -#define CONFIG_CMD_PING -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_SCSI -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_USB +#define CONFIG_SCSI #endif - #define CONFIG_WATCHDOG /* watchdog enabled */ #define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */ @@ -505,7 +458,8 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (256 << 20) /* Increase max gunzip size */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ @@ -526,13 +480,10 @@ #define CONFIG_NETMASK 255.255.255.0 /* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 +#define CONFIG_LOADADDR 0x10000000 -#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -#define CONFIG_BAUDRATE 115200 - #if defined(CONFIG_PCI1) #define PCI_ENV \ "pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da0 15;" \ @@ -595,9 +546,9 @@ "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ " $filesize\0" \ "consoledev=ttyS0\0" \ -"ramdiskaddr=2000000\0" \ +"ramdiskaddr=0x18000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ -"fdtaddr=c00000\0" \ +"fdtaddr=0x17c00000\0" \ "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \ "bdev=sda3\0" \ "en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \ @@ -633,9 +584,9 @@ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ + "ramdiskaddr=0x18000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x17c00000\0" \ "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \ "bdev=sda3\0" #endif