X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8568MDS.h;h=01ee69c0131b7a53e301b9aab079662732b8b537;hb=e4b91f085d4259f187052ff724c80af38fc11b18;hp=39459ded28fc28ddb92b3dd310c2668f0539ff15;hpb=bb597c0eeb7ee2f6e983577d993c76a30dd3c2b4;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 39459de..01ee69c 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2004-2007, 2010-2011 Freescale Semiconductor. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -10,30 +9,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_DISPLAY_BOARDINFO - -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC8568 1 /* MPC8568 specific */ -#define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */ - -#define CONFIG_SYS_TEXT_BASE 0xfff80000 - #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller */ #define CONFIG_PCIE1 1 /* PCIE controller */ #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ -#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_QE /* Enable QE */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); @@ -51,8 +35,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_ENABLE_36BIT_PHYS 1 -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ - #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 @@ -60,8 +42,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ @@ -71,7 +51,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) @@ -139,8 +118,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* @@ -220,10 +197,9 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -317,9 +293,6 @@ extern unsigned long get_clock_freq(void); #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP @@ -330,7 +303,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 @@ -353,10 +325,9 @@ extern unsigned long get_clock_freq(void); /* * Environment */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000) -#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ #define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ @@ -365,37 +336,13 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO - -#if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -#endif #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ /* * For booting Linux, the board info and command line data @@ -423,7 +370,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_IPADDR 192.168.1.253 -#define CONFIG_HOSTNAME unknown +#define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/nfsroot" #define CONFIG_BOOTFILE "your.uImage" @@ -433,10 +380,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/ -#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ - -#define CONFIG_BAUDRATE 115200 - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \