X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8548CDS.h;h=095193153a7b3b02b7850b8df0bf49c8509b7fb5;hb=a29491ade0adf3dbb9dc51be8b45530edde1f1df;hp=fc3cc0c533d89eb6b1b656ab05dd71e9f6b3de2f;hpb=a958c58571ef2af420f482f47a34924d75510065;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index fc3cc0c..0951931 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -16,10 +16,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI1 /* PCI controller 1 */ -#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ -#undef CONFIG_PCI2 - #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ @@ -34,7 +30,6 @@ /* * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_ENABLE_36BIT_PHYS 1 #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -47,8 +42,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 - /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ @@ -131,14 +124,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST \ {CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS} -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_HWCONFIG /* enable hwconfig */ @@ -248,8 +233,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) @@ -269,13 +253,8 @@ */ #if !CONFIG_IS_ENABLED(DM_I2C) #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } -#else -#define CONFIG_SYS_SPD_BUS_NUM 0 #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_CCID - /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. @@ -324,18 +303,6 @@ #endif #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ -#ifdef CONFIG_LEGACY -#define BRIDGE_ID 17 -#define VIA_ID 2 -#else -#define BRIDGE_ID 28 -#define VIA_ID 4 -#endif - -#if defined(CONFIG_PCI) -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #if defined(CONFIG_TSEC_ENET) #define CONFIG_TSEC1 1 @@ -380,7 +347,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* * Environment Configuration @@ -401,15 +367,15 @@ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect off " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ + "erase " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect on " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize\0" \ "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \