X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8544DS.h;h=f4f41da4988b6d005206778224bb757245261e8a;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=64e0aa1ca6f6eccd8ee528f1634b867e3769fa97;hpb=4bafceff0e9e5a36908031e41c69a6b37e82da58;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 64e0aa1..f4f41da 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -17,14 +16,12 @@ #define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ -#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ +#include extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ @@ -40,14 +37,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_ENABLE_36BIT_PHYS 1 -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -69,8 +62,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #error ("CONFIG_SPD_EEPROM is required") #endif -#undef CONFIG_CLOCKS_IN_MHZ - /* * Memory map * @@ -121,8 +112,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_LBC_NONCACHE_BASE 0xf8000000 @@ -175,7 +164,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * open - index 2 * shorted - index 1 */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -267,8 +255,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif -#undef CONFIG_EEPRO100 -#undef CONFIG_TULIP #ifndef CONFIG_PCI_PNP #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS @@ -283,14 +269,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE -#endif /* SCSCI */ +#endif /* CONFIG_SCSI_AHCI */ #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -316,13 +300,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Environment */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */ -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 -#else -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#endif -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ @@ -372,7 +349,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_IPADDR 192.168.1.251 -#define CONFIG_HOSTNAME 8544ds_unknown +#define CONFIG_HOSTNAME "8544ds_unknown" #define CONFIG_ROOTPATH "/nfs/mpc85xx" #define CONFIG_BOOTFILE "8544ds/uImage.uboot" #define CONFIG_UBOOTPATH 8544ds/u-boot.bin /* TFTP server */