X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8536DS.h;h=9298c3080cb3dd06f5a6ca66164d0a23362f8617;hb=312a6c016a2d81aa3fbc605f5c0c315b6a4e3464;hp=f15e1626f0b7e9ef158df3b518004950eb869b00;hpb=5fcb084932de05bba2dee10e340638a2b1e6f8c0;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index f15e162..9298c30 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -11,24 +11,13 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_DISPLAY_BOARDINFO #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT 1 #endif -#ifdef CONFIG_NAND -#define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_NAND 1 -#ifdef CONFIG_NAND_SPL -#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ -#else -#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds -#define CONFIG_SYS_TEXT_BASE 0xf8f82000 -#endif /* CONFIG_NAND_SPL */ -#endif - #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 #define CONFIG_SYS_TEXT_BASE 0xf8f40000 @@ -60,7 +49,6 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -#define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -72,7 +60,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ -#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -220,8 +207,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ - defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #else @@ -319,7 +305,6 @@ CONFIG_SYS_NAND_BASE + 0x80000, \ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) @@ -350,17 +335,10 @@ | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_RAMBOOT_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#else #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif #define CONFIG_SYS_BR4_PRELIM \ (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \ @@ -390,7 +368,6 @@ * shorted - index 1 */ #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -408,13 +385,6 @@ #define CONFIG_SYS_HUSH_PARSER /* - * Pass open firmware flat tree - */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 - -/* * I2C */ #define CONFIG_SYS_I2C @@ -442,10 +412,8 @@ * eSPI - Enhanced SPI */ #define CONFIG_HARD_SPI -#define CONFIG_FSL_ESPI #if defined(CONFIG_SPI_FLASH) -#define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 @@ -554,7 +522,6 @@ #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_ATI_RADEON_FB #define CONFIG_VIDEO_LOGO -/*#define CONFIG_CONSOLE_CURSOR*/ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE3_IO_VIRT #endif @@ -623,12 +590,7 @@ */ #if defined(CONFIG_SYS_RAMBOOT) -#if defined(CONFIG_RAMBOOT_NAND) -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) -#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) -#elif defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -660,20 +622,15 @@ /* * Command line configuration. */ -#include - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII -#define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ -#define CONFIG_CMD_SETEXPR #define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_NET #endif #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -744,13 +701,9 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:E0:0C:02:00:FD #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD #define CONFIG_HAS_ETH2 -#define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD #define CONFIG_HAS_ETH3 -#define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD #endif #define CONFIG_IPADDR 192.168.1.254