X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC837XEMDS.h;h=f9c1b170d1d6eb690cabb56dcb66c994fc536949;hb=d3c23a790fb24f9cb5cc467b81b0c3ad3eeb1f96;hp=61de084cc9da9bdeeac3454ff8e1c76c63966081;hpb=d075eec500acffed5fa404a45a3e12e158d0cb33;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 61de084..f9c1b17 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -84,11 +84,19 @@
 	HRCWH_LDP_CLEAR)
 #endif
 
+/* Arbiter Configuration Register */
+#define CFG_ACR_PIPE_DEP	3	/* Arbiter pipeline depth is 4 */
+#define CFG_ACR_RPTCNT		3	/* Arbiter repeat count is 4 */
+
+/* System Priority Control Register */
+#define CFG_SPCR_TSECEP		3	/* eTSEC1/2 emergency has highest priority */
+
 /*
- * eTSEC Clock Config
+ * IP blocks clock configuration
  */
 #define CFG_SCCR_TSEC1CM	1	/* CSB:eTSEC1 = 1:1 */
 #define CFG_SCCR_TSEC2CM	1	/* CSB:eTSEC2 = 1:1 */
+#define CFG_SCCR_SATACM		SCCR_SATACM_2	/* CSB:SATA[0:3] = 2:1 */
 
 /*
  * System IO Config
@@ -218,7 +226,7 @@
  * FLASH on the Local Bus
  */
 #define CFG_FLASH_CFI		/* use the Common Flash Interface */
-#define CFG_FLASH_CFI_DRIVER	/* use the CFI driver */
+#define CONFIG_FLASH_CFI_DRIVER	/* use the CFI driver */
 #define CFG_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE		32 /* max FLASH size is 32M */
 
@@ -231,7 +239,7 @@
 #define CFG_OR0_PRELIM		( (~(CFG_FLASH_SIZE - 1) << 20) \
 				| OR_UPM_XAM \
 				| OR_GPCM_CSNT \
-				| OR_GPCM_ACS_0b11 \
+				| OR_GPCM_ACS_DIV2 \
 				| OR_GPCM_XACS \
 				| OR_GPCM_SCY_15 \
 				| OR_GPCM_TRLX \
@@ -330,7 +338,7 @@
 #define CFG_PCI_MMIO_BASE	0x90000000
 #define CFG_PCI_MMIO_PHYS	CFG_PCI_MMIO_BASE
 #define CFG_PCI_MMIO_SIZE	0x10000000 /* 256M */
-#define CFG_PCI_IO_BASE		0xE0300000
+#define CFG_PCI_IO_BASE		0x00000000
 #define CFG_PCI_IO_PHYS		0xE0300000
 #define CFG_PCI_IO_SIZE		0x100000 /* 1M */
 
@@ -381,6 +389,34 @@
 /* Options are: TSEC[0-1] */
 #define CONFIG_ETHPRIME		"eTSEC1"
 
+/* SERDES */
+#define CONFIG_FSL_SERDES
+#define CONFIG_FSL_SERDES1	0xe3000
+#define CONFIG_FSL_SERDES2	0xe3100
+
+/*
+ * SATA
+ */
+#define CONFIG_LIBATA
+#define CONFIG_FSL_SATA
+
+#define CFG_SATA_MAX_DEVICE	2
+#define CONFIG_SATA1
+#define CFG_SATA1_OFFSET	0x18000
+#define CFG_SATA1		(CFG_IMMR + CFG_SATA1_OFFSET)
+#define CFG_SATA1_FLAGS		FLAGS_DMA
+#define CONFIG_SATA2
+#define CFG_SATA2_OFFSET	0x19000
+#define CFG_SATA2		(CFG_IMMR + CFG_SATA2_OFFSET)
+#define CFG_SATA2_FLAGS		FLAGS_DMA
+
+#ifdef CONFIG_FSL_SATA
+#define CONFIG_LBA48
+#define CONFIG_CMD_SATA
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+#endif
+
 /*
  * Environment
  */
@@ -466,6 +502,7 @@
 /*
  * MMU Setup
  */
+#define CONFIG_HIGH_BATS	1	/* High BATs supported */
 
 /* DDR: cache cacheable */
 #define CFG_SDRAM_LOWER		CFG_SDRAM_BASE
@@ -559,7 +596,7 @@
 
 #define CONFIG_BAUDRATE 115200
 
-#define CONFIG_LOADADDR 200000	/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 500000	/* default location for tftp and bootm */
 
 #define CONFIG_BOOTDELAY 6	/* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS		/* the boot command will set bootargs */
@@ -570,7 +607,7 @@
    "ramdiskaddr=1000000\0"						\
    "ramdiskfile=ramfs.83xx\0"						\
    "fdtaddr=400000\0"							\
-   "fdtfile=mpc837xemds.dtb\0"						\
+   "fdtfile=mpc8379_mds.dtb\0"						\
    ""
 
 #define CONFIG_NFSBOOTCOMMAND						\