X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8360EMDS.h;h=7b82c43dd287eb0ca91a6ac0bd93840b55c019e9;hb=0ce8437f3006f86d093f83120c64f657bbac3c31;hp=60c996841d9599f23acfbd170c1962718adc9523;hpb=4a9932a4364b548773bc131bf85e24a2ec15f2b0;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 60c9968..7b82c43 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -30,6 +30,9 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ #undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ @@ -161,7 +164,7 @@ * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -178,14 +181,14 @@ */ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Local Bus Configuration & Clock Setup */ -#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4) +#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP +#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 #define CONFIG_SYS_LBC_LBCR 0x00000000 /* @@ -306,7 +309,6 @@ * Serial Port */ #define CONFIG_CONS_INDEX 1 -#undef CONFIG_SERIAL_SOFTWARE_FIFO #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -319,6 +321,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -350,15 +353,15 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_MMIO_BASE 0x90000000 -#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -#define CONFIG_SYS_PCI_IO_PHYS 0xE0300000 -#define CONFIG_SYS_PCI_IO_SIZE 0x100000 /* 1M */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 +#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE +#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xE0300000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ #define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 @@ -369,6 +372,7 @@ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_PCI_STREAMING #undef CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -381,11 +385,13 @@ #define CONFIG_NET_MULTI 1 #endif +#define CONFIG_HWCONFIG 1 + /* * QE UEC ethernet configuration */ #define CONFIG_UEC_ETH -#define CONFIG_ETHPRIME "FSL UEC0" +#define CONFIG_ETHPRIME "UEC0" #define CONFIG_PHY_MODE_NEED_CHANGE #define CONFIG_UEC_ETH1 /* GETH1 */ @@ -396,7 +402,8 @@ #define CONFIG_SYS_UEC1_TX_CLK QE_CLK9 #define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH #define CONFIG_SYS_UEC1_PHY_ADDR 0 -#define CONFIG_SYS_UEC1_INTERFACE_MODE ENET_1000_GMII +#define CONFIG_SYS_UEC1_INTERFACE_TYPE RGMII_ID +#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000 #endif #define CONFIG_UEC_ETH2 /* GETH2 */ @@ -407,7 +414,8 @@ #define CONFIG_SYS_UEC2_TX_CLK QE_CLK4 #define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH #define CONFIG_SYS_UEC2_PHY_ADDR 1 -#define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_1000_GMII +#define CONFIG_SYS_UEC2_INTERFACE_TYPE RGMII_ID +#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000 #endif /* @@ -480,16 +488,17 @@ /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* @@ -539,14 +548,14 @@ #ifdef CONFIG_PCI /* PCI MEM space: cacheable */ -#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI1_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U /* PCI MMIO space: cache-inhibit and guarded */ -#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI_MMIO_PHYS | BATL_PP_10 | \ +#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI1_MMIO_PHYS | BATL_PP_10 | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI1_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #else @@ -560,14 +569,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -581,14 +582,12 @@ #if defined(CONFIG_UEC_ETH) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:04:9f:ef:01:01 #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02 #endif #define CONFIG_BAUDRATE 115200 -#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */ +#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ #define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ @@ -598,7 +597,7 @@ "consoledev=ttyS0\0" \ "ramdiskaddr=1000000\0" \ "ramdiskfile=ramfs.83xx\0" \ - "fdtaddr=400000\0" \ + "fdtaddr=780000\0" \ "fdtfile=mpc836x_mds.dtb\0" \ ""