X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8349ITX.h;h=eaa59fde41b87b82b94ed5b01eba0a486a68ae5c;hb=37d416324b657f38822f88314f2c7f7804405f02;hp=f633f24bd59fd4fc2c6a1f9df9740c0f3b397b38;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index f633f24..eaa59fd 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -63,7 +63,7 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_MPC834X		/* MPC834x family (8343, 8347, 8349) */
+#define CONFIG_MPC834x		/* MPC834x family (8343, 8347, 8349) */
 #define CONFIG_MPC8349		/* MPC8349 specific */
 
 #define CONFIG_SYS_IMMR		0xE0000000	/* The IMMR is relocated to here */
@@ -78,6 +78,8 @@
 #ifdef CONFIG_MPC8349ITX
 #define CONFIG_COMPACT_FLASH	/* The CF card interface on the back of the board */
 #define CONFIG_VSC7385_ENET	/* VSC7385 ethernet support */
+#define CONFIG_SATA_SIL3114	/* SIL3114 SATA controller */
+#define CONFIG_SYS_USB_HOST	/* use the EHCI USB controller */
 #endif
 
 #define CONFIG_PCI
@@ -94,10 +96,10 @@
 
 #define CONFIG_FSL_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C_OFFSET		0x3000
 #define CONFIG_SYS_I2C2_OFFSET		0x3100
 #define CONFIG_SYS_SPD_BUS_NUM		1	/* The I2C bus for SPD */
+#define CONFIG_SYS_RTC_BUS_NUM		1	/* The I2C bus for RTC */
 
 #define CONFIG_SYS_I2C_8574_ADDR1	0x20	/* I2C1, PCF8574 */
 #define CONFIG_SYS_I2C_8574_ADDR2	0x21	/* I2C1, PCF8574 */
@@ -141,7 +143,35 @@
 
 #define ATA_RESET_TIME	1	/* If a CF card is not inserted, time out quickly */
 
-#define CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * SATA
+ */
+#ifdef CONFIG_SATA_SIL3114
+
+#define CONFIG_SYS_SATA_MAX_DEVICE      4
+#define CONFIG_LIBATA
+#define CONFIG_LBA48
+
+#endif
+
+#ifdef CONFIG_SYS_USB_HOST
+/*
+ * Support USB
+ */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_FSL
+
+/* Current USB implementation supports the only USB controller,
+ * so we have to choose between the MPH or the DR ones */
+#if 1
+#define CONFIG_HAS_FSL_MPH_USB
+#else
+#define CONFIG_HAS_FSL_DR_USB
+#endif
 
 #endif
 
@@ -158,6 +188,9 @@
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	(DDR_SDRAM_CLK_CNTL_SS_EN | \
 				DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
 
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_MAX_MEM_MAPPED   ((phys_size_t)256 << 20)
+
 #ifdef CONFIG_HARD_I2C
 #define CONFIG_SPD_EEPROM		/* use SPD EEPROM for DDR setup*/
 #endif
@@ -266,7 +299,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 #undef	CONFIG_SYS_RAMBOOT
 #endif
 
-#define CONFIG_L1_INIT_RAM
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR	0xFD000000	/* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_END	0x1000		/* End of used area in RAM*/
@@ -276,7 +308,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN		(384 * 1024) /* Reserve 384 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024) /* Reserved for malloc */
 
 /*
@@ -285,7 +317,8 @@ boards, we say we have two, but don't display a message if we find only one. */
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR	(LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000
 
 #define CONFIG_SYS_LBC_LSRT	0x32000000    /* LB sdram refresh timer, about 6us */
@@ -348,16 +381,9 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_SYS_PCI2_IO_SIZE	0x01000000	/* 16M */
 #endif
 
-#define _IO_BASE		0x00000000	/* points to PCI I/O space */
-
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP			/* do pci plug-and-play */
 
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x)	    (x)
-#endif
-
 #ifndef CONFIG_PCI_PNP
     #define PCI_ENET0_IOADDR	0x00000000
     #define PCI_ENET0_MEMADDR	CONFIG_SYS_PCI2_MEM_BASE
@@ -448,11 +474,26 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_CMD_IRQ
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 #define CONFIG_CMD_SDRAM
 
+#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \
+    || defined(CONFIG_USB_STORAGE)
+    #define CONFIG_DOS_PARTITION
+    #define CONFIG_CMD_FAT
+    #define CONFIG_SUPPORT_VFAT
+#endif
+
 #ifdef CONFIG_COMPACT_FLASH
     #define CONFIG_CMD_IDE
-    #define CONFIG_CMD_FAT
+#endif
+
+#ifdef CONFIG_SATA_SIL3114
+    #define CONFIG_CMD_SATA
+#endif
+
+#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE)
+    #define CONFIG_CMD_EXT2
 #endif
 
 #ifdef CONFIG_PCI
@@ -475,7 +516,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 
 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
-#define CONFIG_LOADADDR	500000	/* default location for tftp and bootm */
+#define CONFIG_LOADADDR	800000	/* default location for tftp and bootm */
 
 #ifdef CONFIG_MPC8349ITX
 #define CONFIG_SYS_PROMPT	"MPC8349E-mITX> "	/* Monitor Command Prompt */
@@ -545,12 +586,14 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_SYS_SPCR_TSEC2EP	3	/* TSEC2 emergency priority (0-3) */
 #define CONFIG_SYS_SCCR_TSEC1CM	1	/* TSEC1 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_TSEC2CM	1	/* TSEC2 & I2C0 clock mode (0-3) */
+#define CONFIG_SYS_SCCR_USBMPHCM 3	/* USB MPH controller's clock */
+#define CONFIG_SYS_SCCR_USBDRCM	0	/* USB DR controller's clock */
 
 /*
  * System IO Config
  */
 #define CONFIG_SYS_SICRH SICRH_TSOBI1	/* Needed for gigabit to work on TSEC 1 */
-#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1)
+#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1)	/* USB DR as device + USB MPH as host */
 
 #define CONFIG_SYS_HID0_INIT	0x000000000
 #define CONFIG_SYS_HID0_FINAL	CONFIG_SYS_HID0_INIT
@@ -592,7 +635,8 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_SYS_IBAT5U	(CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L	(0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6L	(0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \
+				 BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 
 #define CONFIG_SYS_IBAT7L	0
@@ -665,7 +709,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_FDTFILE		mpc8349emitxgp.dtb
 #endif
 
-#define CONFIG_BOOTDELAY	0
+#define CONFIG_BOOTDELAY	6
 
 #define XMK_STR(x)	#x
 #define MK_STR(x)	XMK_STR(x)
@@ -688,7 +732,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 		"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; "	\
 		"protect on " MK_STR(TEXT_BASE) " +$filesize; "		\
 		"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0"	\
-	"fdtaddr=400000\0"						\
+	"fdtaddr=780000\0"						\
 	"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"
 
 #define CONFIG_NFSBOOTCOMMAND						\