X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8313ERDB.h;h=9cea76ae9b944dcb3411db108d9d829e6d7009c7;hb=302b2e5babb11b24c7808b79521851457fb2d8e8;hp=fd80be59042d7c993b0a36a7d0b2c84b1d3bd0a7;hpb=bd23b22badadcdc414a900828253961fc5ec6c39;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index fd80be5..9cea76a 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -1,23 +1,7 @@ /* * Copyright (C) Freescale Semiconductor, Inc. 2006, 2010. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* * mpc8313epb board configuration file @@ -26,15 +10,34 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + /* * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83xx 1 #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 +#ifdef CONFIG_NAND +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif + +#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */ +#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 +#define CONFIG_SPL_MAX_SIZE (4 * 1024) +#define CONFIG_SPL_PAD_TO 0x4000 + #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 @@ -42,13 +45,11 @@ #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) -#ifdef CONFIG_NAND_U_BOOT -#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */ -#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 -#ifdef CONFIG_NAND_SPL +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ -#endif /* CONFIG_NAND_SPL */ -#endif /* CONFIG_NAND_U_BOOT */ +#endif + +#endif /* CONFIG_NAND */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFE000000 @@ -59,6 +60,7 @@ #endif #define CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_ELBC 1 #define CONFIG_MISC_INIT_R @@ -87,7 +89,7 @@ #define CONFIG_SYS_IMMR 0xE0000000 -#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD) #define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR #endif @@ -227,7 +229,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && \ - !defined(CONFIG_NAND_SPL) + !defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_RAMBOOT #endif @@ -256,7 +258,7 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /*TODO */ /* drivers/mtd/nand/nand.c */ -#ifdef CONFIG_NAND_SPL +#if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_NAND_BASE 0xFFF00000 #else #define CONFIG_SYS_NAND_BASE 0xE2800000 @@ -270,7 +272,6 @@ "mtdparts=e2800000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)" #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384 @@ -292,7 +293,7 @@ | OR_FCM_EHTR) /* 0xFFFF8396 */ -#ifdef CONFIG_NAND_U_BOOT +#ifdef CONFIG_NAND #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM @@ -385,14 +386,15 @@ #define CONFIG_SYS_HUSH_PARSER /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* * General PCI @@ -449,7 +451,7 @@ /* * Environment */ -#if defined(CONFIG_NAND_U_BOOT) +#if defined(CONFIG_NAND) #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_OFFSET (512 * 1024) #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE @@ -496,7 +498,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_PCI -#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT) +#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND) #undef CONFIG_CMD_SAVEENV #undef CONFIG_CMD_LOADS #endif @@ -509,7 +511,6 @@ */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Print Buffer Size */ @@ -518,7 +519,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ /* * For booting Linux, the board info and command line data @@ -570,7 +570,7 @@ HRCWH_TSEC2M_IN_RGMII |\ HRCWH_BIG_ENDIAN) -#ifdef CONFIG_NAND_SPL +#ifdef CONFIG_NAND #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\ HRCWH_FROM_0XFFF00100 |\ HRCWH_ROM_LOC_NAND_SP_8BIT |\