X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8313ERDB.h;h=1201133e2b0bf06a8c03d5702799c739d7a406d4;hb=0ce8437f3006f86d093f83120c64f657bbac3c31;hp=0ef4ebaec7681a12764cb7fa5074a2b62bde1f6a;hpb=9eb468da3fd8753de55ab271d6ff5ed7f36d7ea2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 0ef4eba..1201133 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -1,5 +1,5 @@ /* - * Copyright (C) Freescale Semiconductor, Inc. 2006. + * Copyright (C) Freescale Semiconductor, Inc. 2006, 2010. * * See file CREDITS for list of people who contributed to this * project. @@ -30,13 +30,17 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83XX 1 -#define CONFIG_MPC831X 1 +#define CONFIG_MPC83xx 1 +#define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFE000000 +#endif + #define CONFIG_PCI -#define CONFIG_83XX_GENERIC_PCI +#define CONFIG_FSL_ELBC 1 #define CONFIG_MISC_INIT_R @@ -196,7 +200,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT @@ -204,20 +208,20 @@ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* * Local Bus LCRR and LBCR regs */ -#define CONFIG_SYS_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4 +#define CONFIG_SYS_LCRR_EADC LCRR_EADC_1 +#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 #define CONFIG_SYS_LBC_LBCR ( 0x00040000 /* TODO */ \ | (0xFF << LBCR_BMT_SHIFT) \ | 0xF ) /* 0x0004ff0f */ @@ -231,6 +235,13 @@ #define CONFIG_SYS_NAND_BASE 0xE2800000 #endif +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITION +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT "nand0=e2800000.flash" +#define MTDPARTS_DEFAULT \ + "mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)" + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 @@ -242,6 +253,7 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 #define CONFIG_SYS_NAND_U_BOOT_OFFS 16384 #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) #define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \ | (2<