X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FMIP405.h;h=5da0005c9bc1ccd04454af62e313de7f70ccdbba;hb=12f05678e157ef4472b4e3611bb7ae9751487ff0;hp=7e6484ee94e1f316ec8b7feefcb7bea5ca2b0b71;hpb=fd4e49c18901a50b1648235f26da1e8caa0f8764;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 7e6484e..5da0005 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -2,23 +2,7 @@ * (C) Copyright 2001, 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -33,8 +17,10 @@ * (easy to change) ***********************************************************/ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_MIP405 1 /* ...on a MIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Note that it may also be a MIP405T board which is a subset of the * MIP405 @@ -50,7 +36,6 @@ ***********************************************************/ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ - /* * BOOTP options */ @@ -59,36 +44,22 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ -#include - -#define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FAT -#define CONFIG_CMD_I2C #define CONFIG_CMD_IDE #define CONFIG_CMD_IRQ #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MII #define CONFIG_CMD_PCI -#define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SAVES #define CONFIG_CMD_BSP #if !defined(CONFIG_MIP405T) - #define CONFIG_CMD_USB #endif - -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** * I2C Stuff: * the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address @@ -96,10 +67,11 @@ * The Atmel EEPROM uses 16Bit addressing. ***************************************************************/ -#define CONFIG_HARD_I2C /* I2c with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ @@ -110,7 +82,6 @@ /* last 6 bits of the address */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ - #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */ @@ -126,10 +97,8 @@ * Environment definitions **************************************************************/ #define CONFIG_BAUDRATE 9600 /* STD Baudrate */ -#define CONFIG_BOOTDELAY 5 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ @@ -163,7 +132,6 @@ * Miscellaneous configurable options **********************************************************/ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -176,6 +144,11 @@ #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ #define CONFIG_SYS_BASE_BAUD 916667 @@ -187,8 +160,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- @@ -198,6 +169,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ #define CONFIG_PCI_PNP /* pci plug-and-play */ /* resource configuration */ @@ -230,11 +202,17 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_UPDATE_FLASH_SIZE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CONFIG_FLASH_SHOW_PROGRESS 45 + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* * JFFS2 partitions @@ -282,6 +260,7 @@ #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ #define CONFIG_BOARD_EARLY_INIT_F 1 +#define CONFIG_BOARD_EARLY_INIT_R /* Peripheral Bus Mapping */ #define PER_PLD_ADDR 0xF4000000 /* smallest window is 1MByte 0x10 0000*/ @@ -291,7 +270,6 @@ #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 #define CONFIG_PORT_ADDR PER_PLD_ADDR + 5 - /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in On Chip SRAM) */ @@ -299,29 +277,15 @@ #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of On Chip SRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* reserve some memory for POST and BOOT limit info */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) -#ifdef CONFIG_POST /* reserve one word for POST Info */ -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4) -#endif - #ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ @@ -339,7 +303,6 @@ #define CONFIG_PHY_ADDR 1 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ #define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ -#define CONFIG_NET_MULTI /************************************************************ * RTC ***********************************************************/ @@ -382,11 +345,6 @@ #define CONFIG_ISO_PARTITION /* Experimental */ /************************************************************ - * Keyboard support - ************************************************************/ -#undef CONFIG_ISA_KEYBOARD - -/************************************************************ * Video support ************************************************************/ #define CONFIG_VIDEO /*To enable video controller support */ @@ -403,7 +361,6 @@ #if !defined(CONFIG_MIP405T) #define CONFIG_USB_UHCI #define CONFIG_USB_KEYBOARD -#define CONFIG_USB_STORAGE /* Enable needed helper functions */ #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ @@ -413,7 +370,6 @@ ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************ @@ -438,5 +394,4 @@ #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version" #endif - #endif /* __CONFIG_H */