X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM54455EVB.h;h=34653f7a464b31f568f249cdea5d1aab10a50229;hb=8947145cd0ae8adf1c5dc0ae6756d49bf5330b48;hp=14dd2a516e9d5206aadd04cc248769274ccd5711;hpb=4bafceff0e9e5a36908031e41c69a6b37e82da58;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 14dd2a5..34653f7 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -1,10 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the Freescale MCF54455 EVB board. * * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -35,21 +34,12 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* Network configuration */ -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC1_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 # define CONFIG_HAS_ETH1 - # define CONFIG_ETHPRIME "FEC0" # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 @@ -67,7 +57,7 @@ # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -#define CONFIG_HOSTNAME M54455EVB +#define CONFIG_HOSTNAME "M54455EVB" #ifdef CONFIG_SYS_STMICRO_BOOT /* ST Micro serial flash */ #define CONFIG_SYS_LOAD_ADDR2 0x40010013 @@ -132,7 +122,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2c */ #define CONFIG_SYS_I2C @@ -144,18 +133,7 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI -#define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x13 -#ifdef CONFIG_CMD_SPI - -# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1)) -#endif /* PCI */ #ifdef CONFIG_CMD_PCI @@ -251,9 +229,6 @@ * Environment is not embedded in u-boot. First time runing may have env * crc error warning if there is no correct environment on the flash. */ -#ifdef CONFIG_CF_SBF -# define CONFIG_ENV_SPI_CS 1 -#endif #undef CONFIG_ENV_OVERWRITE /*----------------------------------------------------------------------- @@ -262,37 +237,24 @@ #ifdef CONFIG_SYS_STMICRO_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS1_BASE -# define CONFIG_ENV_OFFSET 0x30000 -# define CONFIG_ENV_SIZE 0x2000 -# define CONFIG_ENV_SECT_SIZE 0x10000 #endif #ifdef CONFIG_SYS_ATMEL_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS1_BASE -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) -# define CONFIG_ENV_SIZE 0x2000 -# define CONFIG_ENV_SECT_SIZE 0x10000 #endif #ifdef CONFIG_SYS_INTEL_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS1_BASE -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) -# define CONFIG_ENV_SIZE 0x2000 -# define CONFIG_ENV_SECT_SIZE 0x20000 #endif -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE, CONFIG_SYS_CS1_BASE } # define CONFIG_FLASH_CFI_LEGACY