X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM54418TWR.h;h=f4d970d0d869804953de45e065559d011beb917e;hb=5b8e76c35ec312a3f73126bd1a2d2c0965b98a9f;hp=bc264276d4687a01942187efca325ae163c8d577;hpb=aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index bc26427..f4d970d 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -4,7 +4,7 @@ * Copyright 2010-2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -18,13 +18,10 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCF5441x /* define processor family */ -#define CONFIG_M54418 /* define processor type */ #define CONFIG_M54418TWR /* M54418TWR board */ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) -#define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_WATCHDOG @@ -40,32 +37,8 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include - -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_CACHE -#undef CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_UBI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#define CONFIG_CMD_MII #undef CONFIG_CMD_NAND -#undef CONFIG_CMD_NAND_YAFFS -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF -#undef CONFIG_CMD_IMLS - -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS /* * NAND FLASH @@ -77,18 +50,16 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_SELECT_DEVICE -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 2 -#define CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN #define CONFIG_SYS_TX_ETH_BUFFER 2 #define CONFIG_HAS_ETH1 @@ -100,7 +71,6 @@ #define CONFIG_SYS_FEC0_PHYADDR 0 #define CONFIG_SYS_FEC1_PHYADDR 1 -#define CONFIG_BOOTDELAY 2 /* autoboot after 5 seconds */ #ifdef CONFIG_SYS_NAND_BOOT #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw rootfstype=jffs2 " \ @@ -117,15 +87,12 @@ "::eth0:off:rw console=ttyS0,115200" #endif -#define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 -#define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 #define CONFIG_ETHPRIME "FEC0" #define CONFIG_IPADDR 192.168.1.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.1.1 #define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_OVERWRITE_ETHADDR_ONCE #define CONFIG_SYS_FEC_BUF_USE_SRAM /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ #ifndef CONFIG_SYS_DISCOVER_PHY @@ -198,7 +165,6 @@ /* I2c */ #undef CONFIG_SYS_FSL_I2C -#undef CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SPEED 80000 @@ -213,8 +179,6 @@ #define CONFIG_HARD_SPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_ATMEL # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ DSPI_CTAR_PCSSCK_1CLK | \ @@ -232,11 +196,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -/* HUSH */ -#define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -#define CONFIG_SYS_PROMPT "-> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) @@ -253,8 +212,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) -#define CONFIG_SYS_HZ 1000 - #define CONFIG_SYS_MBAR 0xFC000000 /* @@ -270,10 +227,8 @@ /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 256 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_GBL_DATA_SIZE) - 32) + GENERATED_GBL_DATA_SIZE) - 32) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) @@ -294,7 +249,7 @@ #endif #if defined(CONFIG_SERIAL_BOOT) -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif @@ -318,14 +273,12 @@ * Environment is embedded in u-boot in the second sector of the flash */ #if !defined(CONFIG_SERIAL_BOOT) /*MRAM boot*/ -#define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_MRAM 1 #define CONFIG_ENV_ADDR (0x40000 - 0x1000) /*MRAM size 40000*/ #define CONFIG_ENV_SIZE 0x1000 #endif #if defined(CONFIG_CF_SBF) -#define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_SPI_FLASH 1 #define CONFIG_ENV_SPI_CS 1 #define CONFIG_ENV_OFFSET 0x40000 @@ -333,7 +286,6 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 #endif #if defined(CONFIG_SYS_NAND_BOOT) -#define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_OFFSET 0x80000 #define CONFIG_ENV_SIZE 0x20000