X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM54418TWR.h;h=271ea3df4ad31fbf07a12958ef7e49149422948c;hb=c9bb942e2f91d9f8e5f25ed1961eba2d64f65b8d;hp=bc264276d4687a01942187efca325ae163c8d577;hpb=8b485ba12b0defa0c4ed3559789250238f8331a8;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index bc26427..271ea3d 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -4,7 +4,7 @@
  * Copyright 2010-2012 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  *
- * SPDX-License-Identifier:	GPL-2.0+ 
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -18,8 +18,6 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_MCF5441x	/* define processor family */
-#define CONFIG_M54418		/* define processor type */
 #define CONFIG_M54418TWR	/* M54418TWR board */
 
 #define CONFIG_MCFUART
@@ -55,8 +53,6 @@
 #define CONFIG_CMD_MISC
 #define CONFIG_CMD_MII
 #undef CONFIG_CMD_NAND
-#undef CONFIG_CMD_NAND_YAFFS
-#define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
@@ -77,13 +73,11 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE
-#define	CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 #endif
 
 /* Network configuration */
 #define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
-#define CONFIG_NET_MULTI		1
 #define CONFIG_MII			1
 #define CONFIG_MII_INIT		1
 #define CONFIG_SYS_DISCOVER_PHY
@@ -117,15 +111,12 @@
 				"::eth0:off:rw console=ttyS0,115200"
 #endif
 
-#define CONFIG_ETHADDR		00:e0:0c:bc:e5:60
-#define CONFIG_ETH1ADDR	00:e0:0c:bc:e5:61
 #define CONFIG_ETHPRIME	"FEC0"
 #define CONFIG_IPADDR		192.168.1.2
 #define CONFIG_NETMASK		255.255.255.0
 #define CONFIG_SERVERIP	192.168.1.1
 #define CONFIG_GATEWAYIP	192.168.1.1
 
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
 #define CONFIG_SYS_FEC_BUF_USE_SRAM
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #ifndef CONFIG_SYS_DISCOVER_PHY
@@ -213,7 +204,6 @@
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x7
 #ifdef CONFIG_CMD_SPI
-#	define CONFIG_SPI_FLASH
 #	define CONFIG_SPI_FLASH_ATMEL
 
 #	define CONFIG_SYS_DSPI_CTAR0	(DSPI_CTAR_TRSZ(7) | \
@@ -253,8 +243,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x10000)
 
-#define CONFIG_SYS_HZ			1000
-
 #define CONFIG_SYS_MBAR		0xFC000000
 
 /*
@@ -270,10 +258,8 @@
 /* End of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_SIZE	0x10000
 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	256
 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - \
-					CONFIG_SYS_GBL_DATA_SIZE) - 32)
+					GENERATED_GBL_DATA_SIZE) - 32)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 #define CONFIG_SYS_SBFHDR_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - 32)