X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM5275EVB.h;h=981670ac069bde2084da8670c2eb7b494a408a52;hb=ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af;hp=f8d43f0a5bb00aad00b713551a985685c87d4d99;hpb=0e8a75550695aba9d8cfe9c7f7713da42c1f3e89;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index f8d43f0..981670a 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -72,6 +72,7 @@
 /* Available command configuration */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
@@ -220,6 +221,19 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */