X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM5275EVB.h;h=607c5dee2fb0b44de478c1336c34debf0a03e8fd;hb=4db386655a889b6466d2c3f40839ad21205c6d21;hp=5e6d0856246e5dc02909e0c116a346d0656af7ba;hpb=8bbbd6337361cadad96b163bde4ae675752b7778;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 5e6d085..607c5de 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -21,7 +21,7 @@
  * (easy to change)
  */
 
-#define CONFIG_SYS_UART_PORT		(0)
+#define CFG_SYS_UART_PORT		(0)
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
@@ -33,25 +33,12 @@
 
 /* Available command configuration */
 
-#ifdef CONFIG_MCFFEC
-#define CONFIG_SYS_DISCOVER_PHY
-/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
-#ifndef CONFIG_SYS_DISCOVER_PHY
-#define FECDUPLEX		FULL
-#define FECSPEED		_100BASET
-#endif
-#endif
-
 /* I2C */
-#define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
-#define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
-#define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
-
-#ifdef CONFIG_MCFFEC
-#	define CONFIG_OVERWRITE_ETHADDR_ONCE
-#endif				/* FEC_ENET */
+#define CFG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
+#define CFG_SYS_I2C_PINMUX_CLR	(0xFFF0)
+#define CFG_SYS_I2C_PINMUX_SET	(0x000F)
 
-#define CONFIG_EXTRA_ENV_SETTINGS		\
+#define CFG_EXTRA_ENV_SETTINGS		\
 	"netdev=eth0\0"				\
 	"loadaddr=10000\0"			\
 	"uboot=u-boot.bin\0"			\
@@ -63,7 +50,7 @@
 	"save\0"				\
 	""
 
-#define CONFIG_SYS_CLK			150000000
+#define CFG_SYS_CLK			150000000
 
 /*
  * Low Level Configuration Settings
@@ -71,54 +58,49 @@
  * You should know what you are doing if you make changes here.
  */
 
-#define CONFIG_SYS_MBAR		0x40000000
+#define CFG_SYS_MBAR		0x40000000
 
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
-#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE	0x10000	/* Size of used area in internal SRAM */
+#define CFG_SYS_INIT_RAM_ADDR	0x20000000
+#define CFG_SYS_INIT_RAM_SIZE	0x10000	/* Size of used area in internal SRAM */
 
 /*-----------------------------------------------------------------------
  * Start addresses for the final memory configuration
  * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
  */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
-
-#define CONFIG_SYS_MONITOR_LEN		0x20000
+#define CFG_SYS_SDRAM_BASE		0x00000000
+#define CFG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_SYS_FLASH_BASE		CFG_SYS_CS0_BASE
 
 /*
  * For booting Linux, the board info and command line data
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization ??
  */
-#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
-#define CONFIG_SYS_BOOTM_LEN		(CONFIG_SYS_SDRAM_SIZE << 20)
+#define CFG_SYS_BOOTMAPSZ		(CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
 
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	1000
 
-#define CONFIG_SYS_FLASH_SIZE		0x200000
+#define CFG_SYS_FLASH_SIZE		0x200000
 
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
 
-#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
-#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
-					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+#define ICACHE_STATUS			(CFG_SYS_INIT_RAM_ADDR + \
+					 CFG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS			(CFG_SYS_INIT_RAM_ADDR + \
+					 CFG_SYS_INIT_RAM_SIZE - 4)
+#define CFG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CFG_SYS_CACHE_ACR0		(CFG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
 					 CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+#define CFG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
 					 CF_CACR_DISD | CF_CACR_INVI | \
 					 CF_CACR_CEIB | CF_CACR_DCM | \
 					 CF_CACR_EUSP)
@@ -126,17 +108,12 @@
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
-#define CONFIG_SYS_CS0_BASE		0xffe00000
-#define CONFIG_SYS_CS0_CTRL		0x00001980
-#define CONFIG_SYS_CS0_MASK		0x001F0001
+#define CFG_SYS_CS0_BASE		0xffe00000
+#define CFG_SYS_CS0_CTRL		0x00001980
+#define CFG_SYS_CS0_MASK		0x001F0001
 
-#define CONFIG_SYS_CS1_BASE		0x30000000
-#define CONFIG_SYS_CS1_CTRL		0x00001900
-#define CONFIG_SYS_CS1_MASK		0x00070001
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_FECI2C		0x0FA0
+#define CFG_SYS_CS1_BASE		0x30000000
+#define CFG_SYS_CS1_CTRL		0x00001900
+#define CFG_SYS_CS1_MASK		0x00070001
 
 #endif	/* _M5275EVB_H */