X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM5253DEMO.h;h=30584fe7159172980c6d4e76a11b5c1ee68109b0;hb=d193c1b6eb05041c94ad9aacd8c94189d1dbc5f8;hp=b5af493b804ee755c4b94966b7c48186d63708f4;hpb=0d41ad7edcd23b6f23a1cf4e07b2d773493306fd;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index b5af493..30584fe 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -33,7 +33,6 @@ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_WATCHDOG /* disable watchdog */ @@ -88,13 +87,13 @@ # define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ #endif -#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 #ifdef CONFIG_DRIVER_DM9000 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) # define DM9000_IO CONFIG_DM9000_BASE # define DM9000_DATA (CONFIG_DM9000_BASE + 4) # undef CONFIG_DM9000_DEBUG +# define CONFIG_DM9000_BYTE_SWAPPED # define CONFIG_OVERWRITE_ETHADDR_ONCE @@ -167,9 +166,8 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -228,9 +226,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM) #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ CF_ADDRMASK(8) | \