X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM5235EVB.h;h=68b695c6fbbd1f73c2179040a51d6b0bdc43866f;hb=2f57139c211d193debddd25f45c02b738cefd871;hp=e507ad92bfd5f2bd5d2f24bf7f21905962369e1d;hpb=5bc0543df3079add8152afa041b887d081d71839;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index e507ad9..68b695c 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -1,10 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the Freescale MCF5329 FireEngine board. * * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -19,56 +18,25 @@ * (easy to change) */ -#define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -/* Timer */ -#define CONFIG_MCFTMR -#undef CONFIG_MCFPIT - /* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_i2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 80000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#define CONFIG_BOOTFILE "u-boot.bin" +/* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 @@ -91,8 +59,6 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000) - #define CONFIG_SYS_CLK 75000000 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2 @@ -120,15 +86,8 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 -#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -141,18 +100,9 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -#ifdef NORFLASH_PS32BIT -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -#else -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#endif -# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) @@ -165,20 +115,9 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#ifdef NORFLASH_PS32BIT -# define CONFIG_ENV_OFFSET (0x8000) -# define CONFIG_ENV_SIZE 0x4000 -# define CONFIG_ENV_SECT_SIZE 0x4000 -#else -# define CONFIG_ENV_OFFSET (0x4000) -# define CONFIG_ENV_SIZE 0x2000 -# define CONFIG_ENV_SECT_SIZE 0x2000 -#endif - /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) @@ -205,7 +144,7 @@ * CS6 - Available * CS7 - Available */ -#ifdef NORFLASH_PS32BIT +#ifdef CONFIG_NORFLASH_PS32BIT # define CONFIG_SYS_CS0_BASE 0xFFC00000 # define CONFIG_SYS_CS0_MASK 0x003f0001 # define CONFIG_SYS_CS0_CTRL 0x00001D00