X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM52277EVB.h;h=98ccbe3d92eeecc663515fdd2f96021615ed920b;hb=0ff27d4a94637d4b1937c625d33212375bd118d9;hp=1801d9d7d588cb3fc0ae0ec0cbdc7979f5975ea2;hpb=0a9e4e772123fe3e2bb499d7d2160c4cfd8a3a8d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 1801d9d..98ccbe3 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -4,23 +4,7 @@ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -34,14 +18,11 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCF5227x /* define processor family */ -#define CONFIG_M52277 /* define processor type */ #define CONFIG_M52277EVB /* M52277EVB board */ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_WATCHDOG @@ -56,24 +37,10 @@ #define CONFIG_BOOTP_HOSTNAME /* Command line configuration */ -#include - -#define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#undef CONFIG_CMD_NET #define CONFIG_CMD_REGINFO -#undef CONFIG_CMD_USB #undef CONFIG_CMD_BMP -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF #define CONFIG_HOSTNAME M52277EVB #define CONFIG_SYS_UBOOT_END 0x3FFFF @@ -81,11 +48,11 @@ #ifdef CONFIG_SYS_STMICRO_BOOT /* ST Micro serial flash */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ + "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ "loadaddr=0x40010000\0" \ "uboot=u-boot.bin\0" \ "load=loadb ${loadaddr} ${baudrate};" \ - "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ + "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ "upd=run load; run prog\0" \ "prog=sf probe 0:2 10000 1;" \ "sf erase 0 30000;" \ @@ -95,30 +62,28 @@ #endif #ifdef CONFIG_SYS_SPANSION_BOOT #define CONFIG_EXTRA_ENV_SETTINGS \ - "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ + "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ "loadaddr=0x40010000\0" \ "uboot=u-boot.bin\0" \ "load=loadb ${loadaddr} ${baudrate}\0" \ "upd=run load; run prog\0" \ - "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \ - " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \ - "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \ - MK_STR(CONFIG_SYS_UBOOT_END) ";" \ - "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \ + "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE) \ + " " __stringify(CONFIG_SYS_UBOOT_END) ";" \ + "era " __stringify(CONFIG_SYS_FLASH_BASE) " " \ + __stringify(CONFIG_SYS_UBOOT_END) ";" \ + "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE) \ " ${filesize}; save\0" \ "updsbf=run loadsbf; run progsbf\0" \ "loadsbf=loadb ${loadaddr} ${baudrate};" \ - "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ + "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ "progsbf=sf probe 0:2 10000 1;" \ "sf erase 0 30000;" \ "sf write ${loadaddr} 0 30000;" \ "" #endif -#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ /* LCD */ #ifdef CONFIG_CMD_BMP -#define CONFIG_LCD #define CONFIG_SPLASH_SCREEN #define CONFIG_LCD_LOGO #define CONFIG_SHARP_LQ035Q7DH06 @@ -127,10 +92,6 @@ /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION -#define CONFIG_MAC_PARTITION -#define CONFIG_ISO_PARTITION #define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000 #define CONFIG_SYS_USB_EHCI_CPU_INIT #endif @@ -145,12 +106,11 @@ #undef CONFIG_MCFPIT /* I2c */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* DSPI and Serial Flash */ @@ -160,8 +120,6 @@ #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SYS_DSPI_CS2 -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_STMICRO # define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ DSPI_CTAR_PCSSCK_1CLK | \ @@ -179,7 +137,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_PROMPT "-> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) @@ -193,8 +150,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) -#define CONFIG_SYS_HZ 1000 - #define CONFIG_SYS_MBAR 0xFC000000 /* @@ -207,12 +162,11 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32) +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32) #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) -#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - 32) +#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) /* * Start addresses for the final memory configuration @@ -232,7 +186,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif @@ -246,7 +200,8 @@ /* * Configuration for environment - * Environment is embedded in u-boot in the second sector of the flash + * Environment is not embedded in u-boot. First time runing may have env + * crc error warning if there is no correct environment on the flash. */ #ifdef CONFIG_CF_SBF # define CONFIG_ENV_IS_IN_SPI_FLASH @@ -261,6 +216,7 @@ */ #ifdef CONFIG_SYS_STMICRO_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE # define CONFIG_ENV_OFFSET 0x30000 # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_SECT_SIZE 0x10000 @@ -268,7 +224,7 @@ #ifdef CONFIG_SYS_SPANSION_BOOT # define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE # define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) +# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_SECT_SIZE 0x8000 #endif @@ -287,6 +243,10 @@ # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } #endif +#define LDS_BOARD_TEXT \ + arch/m68k/cpu/mcf5227x/built-in.o (.text*) \ + arch/m68k/lib/built-in.o (.text*) + /* * This is setting for JFFS2 support in u-boot. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. @@ -302,6 +262,19 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ + CF_ACR_EN | CF_ACR_SM_ALL) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ + CF_CACR_DISD | CF_CACR_INVI | \ + CF_CACR_CEIB | CF_CACR_DCM | \ + CF_CACR_EUSP) + /*----------------------------------------------------------------------- * Memory bank definitions */