X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FM5208EVBE.h;h=a548af687d55dc1bfab6dab6416f98bc3dfc3d8e;hb=0223462b373b975d970fa86e5e1a7eadd1d41820;hp=3cc259ffd1c38f789d8ee0a58f3aa6aebf62f434;hpb=f628e2f72daee810aa568619b6629da68ad042d6;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 3cc259f..a548af6 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -1,26 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the Freescale MCF5208EVBe. * * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA */ #ifndef _M5208EVBE_H @@ -30,35 +13,14 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCF520x /* define processor family */ -#define CONFIG_M5208 /* define processor type */ - #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 -/* Command line configuration */ -#include - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#undef CONFIG_CMD_I2C -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO - #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 @@ -84,27 +46,23 @@ #undef CONFIG_MCFPIT /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR -#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ #define CONFIG_UDP_CHECKSUM #ifdef CONFIG_MCFFEC -# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 # define CONFIG_SERVERIP 192.162.1.1 # define CONFIG_GATEWAYIP 192.162.1.1 -# define CONFIG_OVERWRITE_ETHADDR_ONCE #endif /* CONFIG_MCFFEC */ -#define CONFIG_HOSTNAME M5208EVBe +#define CONFIG_HOSTNAME "M5208EVBe" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ @@ -118,21 +76,9 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_PROMPT "-> " -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#ifdef CONFIG_CMD_KGDB -# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */ #define CONFIG_SYS_LOAD_ADDR 0x40010000 -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ #define CONFIG_SYS_PLL_ODR 0x36 #define CONFIG_SYS_PLL_FDR 0x7D @@ -146,10 +92,9 @@ */ /* Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -202,11 +147,27 @@ #define CONFIG_ENV_OFFSET 0x2000 #define CONFIG_ENV_SIZE 0x1000 #define CONFIG_ENV_SECT_SIZE 0x2000 -#define CONFIG_ENV_IS_IN_FLASH 1 + +#define LDS_BOARD_TEXT \ + . = DEFINED(env_offset) ? env_offset : .; \ + env/embedded.o(.text*); /* Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 16 +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ + CF_ACR_EN | CF_ACR_SM_ALL) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ + CF_CACR_DISD | CF_CACR_INVI | \ + CF_CACR_CEIB | CF_CACR_DCM | \ + CF_CACR_EUSP) + /* Chipselect bank definitions */ /* * CS0 - NOR Flash