X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FJSE.h;h=6ce789d7faba2843c74cf6916201ce72d3d40f2b;hb=842033e6964e9e5d34aca893c1845416dd8ac2cc;hp=c692b5458d5a130a9a5991fad53319a7ff64ed64;hpb=550650ddd0fde00f245bc3da72d7272844198394;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/JSE.h b/include/configs/JSE.h index c692b54..6ce789d 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -37,7 +37,7 @@ /* JSE has a PPC405GPr */ #define CONFIG_405GP 1 /* ... which is a 4xxx series */ -#define CONFIG_4xx 1 +#define CONFIG_4x 1 /* ... with a 33MHz OSC. connected to the SysCLK input */ #define CONFIG_SYS_CLK_FREQ 33333333 /* ... with on-chip memory here (4KBytes) */ @@ -46,6 +46,8 @@ /* Do not set up locked dcache as init ram. */ #undef CONFIG_SYS_INIT_DCACHE_CS +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */ #define CONFIG_SYSTEMACE 1 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 @@ -57,10 +59,9 @@ /* ... place INIT RAM in the OCM address */ # define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* ... give it the whole init ram */ -# define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE +# define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* ... Shave a bit off the end for global data */ -# define CONFIG_SYS_GBL_DATA_SIZE 128 -# define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +# define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* ... and place the stack pointer at the top of what's left. */ # define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET @@ -105,12 +106,6 @@ /* Set console baudrate to 9600 */ #define CONFIG_BAUDRATE 9600 -/* Size (bytes) of interrupt driven serial port buffer. - * Set to 0 to use polling instead of interrupts. - * Setting to 0 will also disable RTS/CTS handshaking. - */ -#undef CONFIG_SERIAL_SOFTWARE_FIFO - /* * Configuration related to auto-boot. * @@ -139,7 +134,6 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_NET_MULTI /* @@ -181,9 +175,6 @@ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -235,6 +226,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #undef CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ @@ -299,15 +291,6 @@ /* Configuration Port location */ #define CONFIG_PORT_ADDR 0xF0000500 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */