X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FJSE.h;h=271ebdacaf2d66d283afbba5dd1566834f16b39e;hb=880540decfb855e96bc14ac84ac7784669e4b382;hp=b0b117575ccec9cf03ab2c0090c37ba34e35d2c9;hpb=24956642ef7de5d8340683d721113f993ffaa0a8;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index b0b1175..271ebda 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -37,7 +37,7 @@
   /* JSE has a PPC405GPr */
 #define CONFIG_405GP 1
   /* ... which is a 4xxx series */
-#define CONFIG_4xx   1
+#define CONFIG_4x   1
   /* ... with a 33MHz OSC. connected to the SysCLK input */
 #define CONFIG_SYS_CLK_FREQ	33333333
   /* ... with on-chip memory here (4KBytes) */
@@ -46,6 +46,8 @@
   /* Do not set up locked dcache as init ram. */
 #undef CONFIG_SYS_INIT_DCACHE_CS
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF80000
+
   /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */
 #define CONFIG_SYSTEMACE 1
 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
@@ -57,10 +59,9 @@
   /* ... place INIT RAM in the OCM address */
 # define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR
   /* ... give it the whole init ram */
-# define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE
+# define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE
   /* ... Shave a bit off the end for global data */
-# define CONFIG_SYS_GBL_DATA_SIZE	128
-# define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+# define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
   /* ... and place the stack pointer at the top of what's left. */
 # define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
@@ -133,7 +134,6 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
-#define CONFIG_NET_MULTI
 
 
 /*
@@ -175,9 +175,6 @@
 #define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
 
 #define CONFIG_SYS_HUSH_PARSER			/* use "hush" command parser	*/
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
@@ -213,11 +210,11 @@
 
 #define CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks */
 
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
-#undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
-#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
-#define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
-#define CONFIG_SYS_I2C_SLAVE		0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0		0x7F
 
 
 /*-----------------------------------------------------------------------
@@ -229,6 +226,7 @@
 #define PCI_HOST_AUTO	2		/* detected via arbiter enable	*/
 
 #define CONFIG_PCI			/* include pci support		*/
+#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
 #define CONFIG_PCI_HOST PCI_HOST_FORCE	/* select pci host function	*/
 #undef	CONFIG_PCI_PNP			/* do pci plug-and-play		*/
 					/* resource configuration	*/
@@ -293,15 +291,6 @@
 /* Configuration Port location */
 #define CONFIG_PORT_ADDR	0xF0000500
 
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM	0x02		/* Software reboot			*/
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */