X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FISPAN.h;h=a5cea8bc3c57ae51bda721831a3498e70c8b0ea7;hb=cdb23792e864153b0c2b943bf011f10c7ba190e1;hp=c0b1d8622467b91d5b7f5237d4f5d3786236dd4b;hpb=be2254423b86572841aa70ff05d20933d1b49823;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h index c0b1d86..a5cea8b 100644 --- a/include/configs/ISPAN.h +++ b/include/configs/ISPAN.h @@ -8,23 +8,7 @@ * Derived from iSPAN 4539 port (iphase4539) by * Wolfgang Grandegger * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H @@ -33,6 +17,8 @@ #define CONFIG_ISPAN /* ...on one of Interphase iSPAN boards */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xFE7A0000 + /*----------------------------------------------------------------------- * Select serial console configuration * @@ -70,8 +56,8 @@ #if CONFIG_ETHER_INDEX == 3 #define CONFIG_SYS_PHY_ADDR 0 -#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) -#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) +#define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) +#define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) #endif /* CONFIG_ETHER_INDEX == 3 */ @@ -142,9 +128,7 @@ /*----------------------------------------------------------------------- * Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_LONGHELP /* #undef to save memory */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ @@ -156,10 +140,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* Default load address */ -#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */ - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - #define CONFIG_SYS_RESET_ADDRESS 0x09900000 #define CONFIG_MISC_INIT_R /* We need misc_init_r() */ @@ -171,7 +151,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ @@ -229,20 +209,11 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/*----------------------------------------------------------------------- * Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */