X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FHIDDEN_DRAGON.h;h=a62ef6364b211afc8c6b529e118f083cd1ffa4a4;hb=3d6ba91e793808d1612152e9f9b8c51b3ca6c926;hp=f6777b9bbaf6cae3dcb383cbb611b012b143c812;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
index f6777b9..a62ef63 100644
--- a/include/configs/HIDDEN_DRAGON.h
+++ b/include/configs/HIDDEN_DRAGON.h
@@ -42,6 +42,8 @@
 #define CONFIG_MPC8245		1
 #define CONFIG_HIDDEN_DRAGON	1
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+
 #if 0
 #define USE_DINK32		1
 #else
@@ -93,7 +95,6 @@
 #define CONFIG_PCI				/* include pci support		*/
 #undef CONFIG_PCI_PNP
 
-#define CONFIG_NET_MULTI			/* Multi ethernet cards support */
 
 #define CONFIG_SYS_RX_ETH_BUFFER	8		/* use 8 rx buffer on eepro100	*/
 
@@ -103,9 +104,7 @@
 #define PCI_ENET1_MEMADDR	0x81000000
 
 #define CONFIG_RTL8139
-#define _IO_BASE	    0x00000000
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x)	    (x)
+
 /* Make sure the ethaddr can be overwritten
    TODO: Remove this on final product
 */
@@ -126,20 +125,18 @@
 #define CONFIG_SYS_MONITOR_BASE	0x00090000
 #define CONFIG_SYS_RAMBOOT		1
 #define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_INIT_RAM_END	0x10000
-#define CONFIG_SYS_GBL_DATA_SIZE	256  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 #else
 #undef	CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_MONITOR_LEN		0x00030000
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128
 
 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_END      0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE      0x1000
+#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 #endif
 
@@ -193,7 +190,6 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* and takes up to 10 msec */
 
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #define CONFIG_SYS_FLASH_BANKS		{ FLASH_BASE0_PRELIM }
 
 /*-----------------------------------------------------------------------
@@ -201,7 +197,7 @@
  */
 
 
-#define CONFIG_WINBOND_83C553	1	/*has a winbond bridge			*/
+/* #define CONFIG_WINBOND_83C553	1	/ *has a winbond bridge			*/
 #define CONFIG_SYS_USE_WINBOND_IDE	0	/*use winbond 83c553 internal IDE ctrlr */
 #define CONFIG_SYS_WINBOND_ISA_CFG_ADDR    0x80005800	/*pci-isa bridge config addr	*/
 #define CONFIG_SYS_WINBOND_IDE_CFG_ADDR    0x80005900	/*ide config addr		*/
@@ -378,14 +374,6 @@
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
 /* values according to the manual */
 #define CONFIG_DRAM_50MHZ	1
 #define CONFIG_SDRAM_50MHZ