X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FHH405.h;h=661db2b16e37c8d8ecb42a795ddc8a16657d7cef;hb=2ae1824196884ba2bafffb7c0d3e8297350591e9;hp=92335239df2fe2e9c6e42c8d734411b3b6cb11e8;hpb=ee1702d75a30d076139d1841383a1fa7220a0e11;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 9233523..661db2b 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -43,6 +43,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HH405 1 /* ...on a HH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -176,9 +178,14 @@ #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ +#define CONFIG_CONS_INDEX 2 /* Use UART1 */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ #define CONFIG_SYS_BASE_BAUD 691200 -#define CONFIG_UART1_CONSOLE /* define for uart1 as console */ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ @@ -306,7 +313,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF80000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc() */ @@ -331,6 +338,7 @@ * I2C EEPROM (CAT24WC16) for environment */ #define CONFIG_HARD_I2C /* I2c with hardware support */ +#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #if 0 /* test-only */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #else @@ -460,12 +468,12 @@ * GPIO0[28-29] - UART1 data signal input/output * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs */ -#define CONFIG_SYS_GPIO0_OSRH 0x40000550 -#define CONFIG_SYS_GPIO0_OSRL 0x00000110 -#define CONFIG_SYS_GPIO0_ISR1H 0x00000000 -#define CONFIG_SYS_GPIO0_ISR1L 0x15555440 -#define CONFIG_SYS_GPIO0_TSRH 0x00000000 +#define CONFIG_SYS_GPIO0_OSRL 0x40000550 +#define CONFIG_SYS_GPIO0_OSRH 0x00000110 +#define CONFIG_SYS_GPIO0_ISR1L 0x00000000 +#define CONFIG_SYS_GPIO0_ISR1H 0x15555440 #define CONFIG_SYS_GPIO0_TSRL 0x00000000 +#define CONFIG_SYS_GPIO0_TSRH 0x00000000 #define CONFIG_SYS_GPIO0_TCR 0xF7FE0017 #define CONFIG_SYS_LCD_ENDIAN (0x80000000 >> 7)