X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FEP88x.h;h=106cc6fba525bd3b8785e2b5cab71124405a6b94;hb=225f0eaa745adfae05931848543d99942798756a;hp=738763b86ff15fba0903e7a5d79880f253168d9c;hpb=7a635e004ec12bd2a0bae9f90fbb5769b524a42e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h index 738763b..106cc6f 100644 --- a/include/configs/EP88x.h +++ b/include/configs/EP88x.h @@ -42,6 +42,7 @@ #define CONFIG_ETHER_ON_FEC2 /* Enable Ethernet on FEC2 */ #if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2) #define CFG_DISCOVER_PHY +#define CONFIG_MII_INIT 1 #define FEC_ENET #endif /* CONFIG_FEC_ENET */ @@ -50,15 +51,25 @@ #define CFG_8xx_CPUCLK_MIN 40000000 #define CFG_8xx_CPUCLK_MAX 133000000 -#define CONFIG_COMMANDS (CONFIG_CMD_DFL \ - | CFG_CMD_DHCP \ - | CFG_CMD_IMMAP \ - | CFG_CMD_MII \ - | CFG_CMD_PING \ - ) +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING -/* This must be included AFTER the definition of CONFIG_COMMANDS */ -#include #define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */ #define CONFIG_BOOTCOMMAND "bootm fe060000" /* Autoboot command */ @@ -127,14 +138,14 @@ */ #define CFG_FLASH_BASE 0xFC000000 #define CFG_FLASH_CFI /* The flash is CFI compatible */ -#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ #define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */ #define CFG_MAX_FLASH_SECT 512 /* Max num of sects on one chip */ /* Environment is in flash */ -#define CFG_ENV_IS_IN_FLASH -#define CFG_ENV_SECT_SIZE 0x20000 /* We use one complete sector */ -#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x20000 /* We use one complete sector */ +#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_OR0_PRELIM 0xFC000160 #define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_PS_32 | BR_MS_GPCM | BR_V) @@ -181,13 +192,13 @@ #define CFG_TBSCR (TBSCR_TBF | TBSCR_TBE) /* PISCR - Periodic Interrupt Status and Control */ -#define CFG_PISCR PISCR_PS +#define CFG_PISCR PISCR_PS /* SCCR - System Clock and reset Control Register */ -#define SCCR_MASK SCCR_EBDF11 +#define SCCR_MASK SCCR_EBDF11 #define CFG_SCCR SCCR_RTSEL -#define CFG_DER 0 +#define CFG_DER 0 /*----------------------------------------------------------------------- * Cache Configuration