X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FDP405.h;h=50d44a0326ef37467c0c5a1e73186afd2acda701;hb=bb1f8b4f8bb0bfce52e0faa4637b975b745824b3;hp=2eadbea35d6968c2322f13b9ec6ac96932f380f3;hpb=11799434c5ff15a612577bb1ad1f4ea1a0595e4b;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 2eadbea..50d44a0 100644
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -216,7 +216,7 @@
 /*-----------------------------------------------------------------------
  * Environment Variable setup
  */
-#define CFG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars */
+#define CONFIG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars */
 #define CFG_ENV_OFFSET		0x100	/* environment starts at the beginning of the EEPROM */
 #define CFG_ENV_SIZE		0x700	/* 2048 bytes may be used for env vars*/
 				   /* total size of a CAT24WC16 is 2048 bytes */
@@ -242,16 +242,6 @@
 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 
 /*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/
-					/* have only 8kB, 16kB is save here	*/
-#define CFG_CACHELINE_SIZE	32	/* ...			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  */