X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FDB64360.h;h=d5ef154dba05365fc9bc47db779936ea16b74724;hb=412665b46134f93464c09405e02f08ac9c62526d;hp=160871b24e2e3449bd33398ca57d9c8a69553c4a;hpb=68d7d65100e84df00bca971c114092731b441090;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index 160871b..d5ef154 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -120,6 +120,8 @@ if we use PCI it has its own MAC addr */ #define CONFIG_DB64360 1 /* this is an DB64360 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */ /*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the DRAM for ECC in the phase we are relocating to it, which isn't so sufficient. @@ -138,7 +140,6 @@ if we use PCI it has its own MAC addr */ /*#define CONFIG_SYS_HUSH_PARSER */ #undef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* * The following defines let you select what serial you want to use @@ -156,7 +157,6 @@ if we use PCI it has its own MAC addr */ #define CONFIG_MPSC_PORT 0 /* to change the default ethernet port, use this define (options: 0, 1, 2) */ -#define CONFIG_NET_MULTI #define MV_ETH_DEVS 2 /* #undef CONFIG_ETHER_PORT_MII */ @@ -200,7 +200,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SERIAL "No. 1" #define CONFIG_SERVERIP 10.2.1.126 -#define CONFIG_ROOTPATH /mnt/yellow_dog_mini +#define CONFIG_ROOTPATH "/mnt/yellow_dog_mini" #define CONFIG_TESTDRAMDATA y @@ -318,8 +318,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */ /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */ -#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ -#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ +#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */ #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */ @@ -351,9 +350,8 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" */ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* unused memory region */ -#define CONFIG_SYS_INIT_RAM_END 0x1000 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for init data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define RELOCATE_INTERNAL_RAM_ADDR #ifdef RELOCATE_INTERNAL_RAM_ADDR @@ -594,14 +592,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #endif /* __CONFIG_H */