X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FDASA_SIM.h;h=117a1367c1d519f5ffff51c6b3b8e0f7575b64ea;hb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;hp=229e4587d07a9e7f3af0e5007a361b3c0fe68657;hpb=a6457f79710ffc649bacccdab1653c141dad6035;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 229e458..117a136 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -34,20 +34,20 @@ */ #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ -#define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */ +#define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */ -#define CONFIG_BOARD_PRE_INIT 1 /* call board_pre_init() */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ +#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ -#define CONFIG_CPUCLOCK 66 -#define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) +#define CONFIG_CPUCLOCK 66 +#define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) -#define CONFIG_BAUDRATE 9600 +#define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */ #define CONFIG_BOOTCOMMAND "bootm ffe00000" /* autoboot command */ -#undef CONFIG_BOOTARGS +#undef CONFIG_BOOTARGS #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ @@ -57,59 +57,62 @@ #define CONFIG_IPADDR 10.0.18.222 #define CONFIG_SERVERIP 10.0.18.190 -#if 0 -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DHCP | \ - CFG_CMD_IRQ | \ - CFG_CMD_BSP | \ - CFG_CMD_ASKENV | \ - CFG_CMD_ELF ) -#else -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_BSP ) -#endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_BSP + #if 0 /* Does not appear to be used?! If it is used, needs to be fixed */ #define CONFIG_SOFT_I2C /* Software I2C support enabled */ #endif -#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include +#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ +#define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ /* The following table includes the supported baudrates */ -#define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } +#define CFG_BAUDRATE_TABLE \ + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } -#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CFG_LOAD_ADDR 0x100000 /* default load address */ -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CFG_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ +#define CFG_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ #define CFG_INIT_RAM_END 0x0f00 /* End of used area in RAM */ #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) @@ -131,37 +134,37 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /*----------------------------------------------------------------------- * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ -#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */ -#define CFG_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */ -#define CFG_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */ +#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */ +#define CFG_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */ +#define CFG_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */ /* * The following defines are added for buggy IOP480 byte interface. * All other boards should use the standard values (CPCI405 etc.) */ -#define CFG_FLASH_READ0 0x0002 /* 0 is standard */ -#define CFG_FLASH_READ1 0x0000 /* 1 is standard */ -#define CFG_FLASH_READ2 0x0004 /* 2 is standard */ +#define CFG_FLASH_READ0 0x0002 /* 0 is standard */ +#define CFG_FLASH_READ1 0x0000 /* 1 is standard */ +#define CFG_FLASH_READ2 0x0004 /* 2 is standard */ -#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ #if 0 #define CFG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */ #else -#define CFG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ +#define CFG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ #endif /*----------------------------------------------------------------------- @@ -170,24 +173,15 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP -#define CONFIG_NET_MULTI /* Multi ethernet cards support */ +#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_TULIP -#define CFG_ETH_DEV_FN 0x0000 -#define CFG_ETH_IOBASE 0x0fff0000 +#define CFG_ETH_DEV_FN 0x0000 +#define CFG_ETH_IOBASE 0x0fff0000 #define CFG_PCI9054_DEV_FN 0x0800 #define CFG_PCI9054_IOBASE 0x0eff0000 -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CFG_DCACHE_SIZE 2048 /* For PLX IOP480 */ -#define CFG_CACHELINE_SIZE 16 /* For IBM 401/403 CPUs */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ -#endif - /* * Init Memory Controller: *