X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FCPU87.h;h=2b1716afeefd64f7b54f492c62b8f94703cdb339;hb=10d1a160f5e28b05f891c050ca2f23855b226f5f;hp=83b010cb66ce57aade87e4ab709ae84907b374d2;hpb=84efbf4d144ff8aaed3cca036aebb1fe69eff3f4;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index 83b010c..2b1716a 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -38,6 +38,12 @@
 #define CONFIG_PCI
 #define CONFIG_CPM2		1	/* Has a CPM2 */
 
+#ifdef CONFIG_BOOT_ROM
+#define CONFIG_SYS_TEXT_BASE	0xFF800000
+#else
+#define	CONFIG_SYS_TEXT_BASE	0xFF000000
+#endif
+
 /*
  * select serial console configuration
  *
@@ -305,9 +311,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END	0x4000	/* End of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128 /* size in bytes reserved for initial data*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x4000	/* Size of used area in DPRAM	*/
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -319,7 +324,7 @@
  */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
 #define CONFIG_SYS_SDRAM_MAX_SIZE	0x08000000	/* max. 128 MB		*/
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 #define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()*/
 
@@ -354,15 +359,6 @@
 #define CONFIG_ENV_SIZE		(2048 - 512)
 #endif
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot		   */
-
-
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */