X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FCPCI4052.h;h=b248639fd0d2ebac843c7b1969152f757b7b3bcd;hb=74ac5facb988fc488a707db228b177ead63a6541;hp=ceeba6e122e9368ca1956444adeec04f2e348c40;hpb=375c2c9e57ea5b8d678475379378f4774aa9cb88;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index ceeba6e..b248639 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -114,8 +114,6 @@
 #define CONFIG_AUTO_UPDATE      1       /* autoupdate via compactflash  */
 #endif
 
-#define CFG_NAND_LEGACY
-
 #undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
 
 #define CONFIG_SDRAM_BANK0	1	/* init onboard SDRAM bank 0	*/
@@ -319,16 +317,6 @@
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */
 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/
-					/* have only 8kB, 16kB is save here	*/
-#define CFG_CACHELINE_SIZE	32	/* ...			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
 /*
  * Init Memory Controller:
  *